| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <zn4uf3mmlmt3who474hwkr44poycfqtjtidshybbg55a3hr63y@zxefqbhiwkbg>
Date: Mon, 30 Dec 2024 17:40:22 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Wasim Nazir <quic_wasimn@...cinc.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
kernel@...cinc.com, Manaf Meethalavalappu Pallikunhi <quic_manafm@...cinc.com>
Subject: Re: [PATCH v5 6/6] arm64: dts: qcom: Enable cpu cooling devices for
QCS9075 platforms
On Sun, Dec 29, 2024 at 08:53:32PM +0530, Wasim Nazir wrote:
> From: Manaf Meethalavalappu Pallikunhi <quic_manafm@...cinc.com>
>
> In QCS9100 SoC, the safety subsystem monitors all thermal sensors and
> does corrective action for each subsystem based on sensor violation
> to comply safety standards. But as QCS9075 is non-safe SoC it
> requires conventional thermal mitigation to control thermal for
> different subsystems.
>
> The cpu frequency throttling for different cpu tsens is enabled in
> hardware as first defense for cpu thermal control. But QCS9075 SoC
> has higher ambient specification. During high ambient condition, even
> lowest frequency with multi cores can slowly build heat over the time
> and it can lead to thermal run-away situations. This patch restrict
> cpu cores during this scenario helps further thermal control and
> avoids thermal critical violation.
>
> Add cpu idle injection cooling bindings for cpu tsens thermal zones
> as a mitigation for cpu subsystem prior to thermal shutdown.
>
> Add cpu frequency cooling devices that will be used by userspace
> thermal governor to mitigate skin thermal management.
Does anything prevent us from having this config as a part of the basic
sa8775p.dtsi setup? If HW is present in the base version but it is not
accessible for whatever reason, please move it the base device config
and use status "disabled" or "reserved" to the respective board files.
>
> Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/qcs9075-rb8.dts | 1 +
> arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 1 +
> arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 1 +
> arch/arm64/boot/dts/qcom/qcs9075-thermal.dtsi | 287 ++++++++++++++++++
> 4 files changed, 290 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-thermal.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs9075-rb8.dts b/arch/arm64/boot/dts/qcom/qcs9075-rb8.dts
> index ecaa383b6508..3ab6deeaacf1 100644
> --- a/arch/arm64/boot/dts/qcom/qcs9075-rb8.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs9075-rb8.dts
> @@ -9,6 +9,7 @@
>
> #include "sa8775p.dtsi"
> #include "sa8775p-pmics.dtsi"
> +#include "qcs9075-thermal.dtsi"
>
> / {
> model = "Qualcomm Technologies, Inc. Robotics RB8";
> diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts
> index d9a8956d3a76..5f2d9f416617 100644
> --- a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts
> @@ -5,6 +5,7 @@
> /dts-v1/;
>
> #include "sa8775p-ride.dtsi"
> +#include "qcs9075-thermal.dtsi"
>
> / {
> model = "Qualcomm Technologies, Inc. QCS9075 Ride Rev3";
> diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts
> index 3b524359a72d..10ce48e7ba2f 100644
> --- a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts
> @@ -5,6 +5,7 @@
> /dts-v1/;
>
> #include "sa8775p-ride.dtsi"
> +#include "qcs9075-thermal.dtsi"
>
> / {
> model = "Qualcomm Technologies, Inc. QCS9075 Ride";
> diff --git a/arch/arm64/boot/dts/qcom/qcs9075-thermal.dtsi b/arch/arm64/boot/dts/qcom/qcs9075-thermal.dtsi
> new file mode 100644
> index 000000000000..40544c8582c4
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/qcs9075-thermal.dtsi
> @@ -0,0 +1,287 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +#include <dt-bindings/thermal/thermal.h>
> +
> +&cpu0 {
> + #cooling-cells = <2>;
> +};
> +
> +&cpu1 {
> + #cooling-cells = <2>;
> + cpu1_idle: thermal-idle {
> + #cooling-cells = <2>;
> + duration-us = <800000>;
> + exit-latency-us = <10000>;
> + };
> +};
> +
> +&cpu2 {
> + #cooling-cells = <2>;
> + cpu2_idle: thermal-idle {
> + #cooling-cells = <2>;
> + duration-us = <800000>;
> + exit-latency-us = <10000>;
> + };
> +};
> +
> +&cpu3 {
> + #cooling-cells = <2>;
> + cpu3_idle: thermal-idle {
> + #cooling-cells = <2>;
> + duration-us = <800000>;
> + exit-latency-us = <10000>;
> + };
> +};
> +
> +&cpu4 {
> + #cooling-cells = <2>;
> + cpu4_idle: thermal-idle {
> + #cooling-cells = <2>;
> + duration-us = <800000>;
> + exit-latency-us = <10000>;
> + };
> +};
> +
> +&cpu5 {
> + #cooling-cells = <2>;
> + cpu5_idle: thermal-idle {
> + #cooling-cells = <2>;
> + duration-us = <800000>;
> + exit-latency-us = <10000>;
> + };
> +};
> +
> +&cpu6 {
> + #cooling-cells = <2>;
> + cpu6_idle: thermal-idle {
> + #cooling-cells = <2>;
> + duration-us = <800000>;
> + exit-latency-us = <10000>;
> + };
> +};
> +
> +&cpu7 {
> + #cooling-cells = <2>;
> + cpu7_idle: thermal-idle {
> + #cooling-cells = <2>;
> + duration-us = <800000>;
> + exit-latency-us = <10000>;
> + };
> +};
> +
> +/ {
> + thermal-zones {
> + cpu-0-1-0-thermal {
> + trips {
> + cpu_0_1_0_passive: trip-point1 {
> + temperature = <116000>;
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_0_1_0_passive>;
> + cooling-device = <&cpu1_idle 100 100>;
> + };
> + };
> + };
> +
> + cpu-0-2-0-thermal {
> + trips {
> + cpu_0_2_0_passive: trip-point1 {
> + temperature = <116000>;
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_0_2_0_passive>;
> + cooling-device = <&cpu2_idle 100 100>;
> + };
> + };
> + };
> +
> + cpu-0-3-0-thermal {
> + trips {
> + cpu_0_3_0_passive: trip-point1 {
> + temperature = <116000>;
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_0_3_0_passive>;
> + cooling-device = <&cpu3_idle 100 100>;
> + };
> + };
> + };
> +
> + cpu-0-1-1-thermal {
> + trips {
> + cpu_0_1_1_passive: trip-point1 {
> + temperature = <116000>;
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_0_1_1_passive>;
> + cooling-device = <&cpu1_idle 100 100>;
> + };
> + };
> + };
> +
> + cpu-0-2-1-thermal {
> + trips {
> + cpu_0_2_1_passive: trip-point1 {
> + temperature = <116000>;
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_0_2_1_passive>;
> + cooling-device = <&cpu2_idle 100 100>;
> + };
> + };
> + };
> +
> + cpu-0-3-1-thermal {
> + trips {
> + cpu_0_3_1_passive: trip-point1 {
> + temperature = <116000>;
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_0_3_1_passive>;
> + cooling-device = <&cpu3_idle 100 100>;
> + };
> + };
> + };
> +
> + cpu-1-0-0-thermal {
> + trips {
> + cpu_1_0_0_passive: trip-point1 {
> + temperature = <116000>;
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_1_0_0_passive>;
> + cooling-device = <&cpu4_idle 100 100>;
> + };
> + };
> + };
> +
> + cpu-1-1-0-thermal {
> + trips {
> + cpu_1_1_0_passive: trip-point1 {
> + temperature = <116000>;
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_1_1_0_passive>;
> + cooling-device = <&cpu5_idle 100 100>;
> + };
> + };
> + };
> +
> + cpu-1-2-0-thermal {
> + trips {
> + cpu_1_2_0_passive: trip-point1 {
> + temperature = <116000>;
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_1_2_0_passive>;
> + cooling-device = <&cpu6_idle 100 100>;
> + };
> + };
> + };
> +
> + cpu-1-3-0-thermal {
> + trips {
> + cpu_1_3_0_passive: trip-point1 {
> + temperature = <116000>;
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_1_3_0_passive>;
> + cooling-device = <&cpu7_idle 100 100>;
> + };
> + };
> + };
> +
> + cpu-1-0-1-thermal {
> + trips {
> + cpu_1_0_1_passive: trip-point1 {
> + temperature = <116000>;
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_1_0_1_passive>;
> + cooling-device = <&cpu4_idle 100 100>;
> + };
> + };
> + };
> +
> + cpu-1-1-1-thermal {
> + trips {
> + cpu_1_1_1_passive: trip-point1 {
> + temperature = <116000>;
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_1_1_1_passive>;
> + cooling-device = <&cpu5_idle 100 100>;
> + };
> + };
> + };
> +
> + cpu-1-2-1-thermal {
> + trips {
> + cpu_1_2_1_passive: trip-point1 {
> + temperature = <116000>;
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_1_2_1_passive>;
> + cooling-device = <&cpu6_idle 100 100>;
> + };
> + };
> + };
> +
> + cpu-1-3-1-thermal {
> + trips {
> + cpu_1_3_1_passive: trip-point1 {
> + temperature = <116000>;
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_1_3_1_passive>;
> + cooling-device = <&cpu7_idle 100 100>;
> + };
> + };
> + };
> + };
> +};
> --
> 2.47.0
>
--
With best wishes
Dmitry
Powered by blists - more mailing lists