linux-kernel - Re: [PATCH 2/2] arm64: dts: qcom: Add cpu scaling clock node

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Message-ID: <e3dfa3a7-feb1-45d1-8dc3-c403cb92c7c0@oss.qualcomm.com>
Date: Mon, 30 Dec 2024 17:42:49 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        Taniya Das <quic_tdas@...cinc.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>,
        Ajit Pandey <quic_ajipan@...cinc.com>,
        Imran Shaik <quic_imrashai@...cinc.com>,
        Jagadeesh Kona <quic_jkona@...cinc.com>, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] arm64: dts: qcom: Add cpu scaling clock node

On 9.11.2024 1:00 AM, Dmitry Baryshkov wrote:
> On Fri, Nov 08, 2024 at 11:54:05AM +0530, Taniya Das wrote:
>> Add cpufreq-hw node to support cpu frequency scaling.
> 
> CPU, not cpu.
> Also the prefix is incorrect for both patches.
> 
>>
>> Signed-off-by: Taniya Das <quic_tdas@...cinc.com>
>> ---

[...]

> 
> This doesn't follow the bindings, does it?
> 
>> +		reg = <0 0x18323000 0 0x1400>,
>> +		      <0 0x18325800 0 0x1400>;
>> +		reg-names = "freq-domain0", "freq-domain1";
>> +
>> +		clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
>> +		clock-names = "xo", "alternate";
> 
> Are the DCVSH interrupts?

32/33 for silver/gold respectively

Konrad