linux-kernel - Re: [PATCH v3 4/5] dt-bindings: memory-controllers: Add support for Versal NET EDAC

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Message-ID: <43dp3ifjol3zjei6zs55tgsdbfmdwnihnjwnuhak7sssrmztoz@3bna4b7hclcu>
Date: Tue, 31 Dec 2024 09:19:52 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Shubhrajyoti Datta <shubhrajyoti.datta@....com>
Cc: Rob Herring <robh@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Borislav Petkov <bp@...en8.de>, Tony Luck <tony.luck@...el.com>, 
	James Morse <james.morse@....com>, Mauro Carvalho Chehab <mchehab@...nel.org>, 
	Robert Richter <rric@...nel.org>, linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-edac@...r.kernel.org, git@....com
Subject: Re: [PATCH v3 4/5] dt-bindings: memory-controllers: Add support for
 Versal NET EDAC

On Tue, Dec 31, 2024 at 12:04:33PM +0530, Shubhrajyoti Datta wrote:
> Add device tree bindings for AMD Versal NET EDAC for DDR controller.
> 
> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@....com>
> ---
> 
> (no changes since v2)
> 
> Changes in v2:
> - rename EDAC to memory controller
> - update the compatible name
> - Add remote proc handle
> - Read the data width from the registers
> - Remove the dwidth, rank and channel number the same is read from the RpMsg.
> 
>  .../amd,versalnet-ddrmc.yaml                  | 40 +++++++++++++++++++
>  1 file changed, 40 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/amd,versalnet-ddrmc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/amd,versalnet-ddrmc.yaml b/Documentation/devicetree/bindings/memory-controllers/amd,versalnet-ddrmc.yaml
> new file mode 100644
> index 000000000000..b6fc3548017d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/amd,versalnet-ddrmc.yaml
> @@ -0,0 +1,40 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/memory-controllers/amd,versalnet-ddrmc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx Versal NET Memory Controller
> +
> +maintainers:
> +  - Shubhrajyoti Datta <shubhrajyoti.datta@....com>
> +
> +description:
> +  The integrated DDR Memory Controllers (DDRMCs) support both DDR4 and LPDDR4/
> +  4X memory interfaces. Versal NET DDR memory controller has an optional ECC support
> +  which correct single bit ECC errors and detect double bit ECC errors.
> +  It also has support for reporting other errors like MMCM (Mixed-Mode Clock
> +  Manager) errors and General software errors.
> +
> +properties:
> +  compatible:
> +    const: amd,versalnet-ddrmc

Not much improved.

> +
> +  amd,rproc:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description:
> +      phandle to the remoteproc_r5 rproc node using which APU interacts
> +      with remote processor.


So no description of memory? I am fine with it, but then note that
bindings are supposed to be complete, so don't come later with missing
pieces.

> +
> +required:
> +  - compatible
> +  - amd,rproc
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    memory-controller {
> +       compatible = "amd,versalnet-ddrmc";
> +       amd,rproc = <&remoteproc_r5>;
> +     };

Misaligned.

Best regards,
Krzysztof