[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <8aa196d4c781444cf55993faea56161b926cb311.camel@surriel.com>
Date: Tue, 31 Dec 2024 11:30:48 -0500
From: Rik van Riel <riel@...riel.com>
To: Borislav Petkov <bp@...en8.de>
Cc: x86@...nel.org, linux-kernel@...r.kernel.org, kernel-team@...a.com,
dave.hansen@...ux.intel.com, luto@...nel.org, peterz@...radead.org,
tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
akpm@...ux-foundation.org, nadav.amit@...il.com,
zhengqi.arch@...edance.com, linux-mm@...ck.org
Subject: Re: [PATCH 01/12] x86/mm: make MMU_GATHER_RCU_TABLE_FREE
unconditional
On Tue, 2024-12-31 at 17:19 +0100, Borislav Petkov wrote:
> On Tue, Dec 31, 2024 at 11:11:51AM -0500, Rik van Riel wrote:
> > Will do. Between your feedback, the suggestions
> > from Qi and Nadav, and the kernel test robot
> > flagging some build issues without CONFIG_CPU_SUP_AMD,
> > there's enough to warrant a v4 :)
>
> Yes, just take your time pls. I need to get through the rest, first,
> in the
> coming days.
>
I'm incorporating the feedback I have so far,
and will test with those improvements.
I'll wait for you to finish making your way
through before coming up with a v4 :)
I do have a question about the second to last patch
"x86/mm: enable AMD translation cache extensions"
It looks like with this patch the translation cache
extensions get enabled (when I read back the MSR),
but the AMD manual suggests I may need to enable
EFER.TCE separately on every CPU?
--
All Rights Reversed.
Powered by blists - more mailing lists