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Message-Id: <1a684565d9765e3db49eb504a9cb6bc72a5d4fd1.1735785110.git.xiaopei01@kylinos.cn>
Date: Thu, 2 Jan 2025 10:32:56 +0800
From: Pei Xiao <xiaopei01@...inos.cn>
To: xiaopei01@...inos.cn
Cc: aford173@...il.com,
aford@...conembedded.com,
arnd@...db.de,
dominique.martinet@...ark-techno.com,
frieder.schrempf@...tron.de,
geert@...ux-m68k.org,
kishon@...nel.org,
l.stach@...gutronix.de,
linux-kernel@...r.kernel.org,
linux-phy@...ts.infradead.org,
m.felsch@...gutronix.de,
sandor.yu@....com,
u.kleine-koenig@...libre.com,
vkoul@...nel.org
Subject: [PATCH] phy: freescale: fsl-samsung-hdmi: fix build error in fsl_samsung_hdmi_phy_configure_pll_lock_det
FIELD_PREP() checks that a value fits into the available bitfield,
but the index div equals to 4,is out of range.
which gcc correctly complains about:
In function ‘fsl_samsung_hdmi_phy_configure_pll_lock_det’,
inlined from ‘fsl_samsung_hdmi_phy_configure’ at
drivers/phy/freescale/phy-fsl-samsung-hdmi.c :470:2:
././include/linux/compiler_types.h:542:38: error: call to ‘__compiletime_assert_538’
declared with attribute error: FIELD_PREP: value too large for the field
542 | _compiletime_assert(condition, msg, __compiletime_assert_,
__COUNTER__)
| ^
././include/linux/compiler_types.h:523:4: note: in definition of
macro ‘__compiletime_assert’ 523 | prefix ## suffix();
| ^~~~~~
././include/linux/compiler_types.h:542:2: note: in expansion of macro
‘_compiletime_assert’
542 | _compiletime_assert(condition, msg, __compiletime_assert_,
__COUNTER__)
REG12_CK_DIV_MASK only two bit, add logical AND to limit range 0~3,
so build error will fix.
Fixes: d567679f2b6a ("phy: freescale: fsl-samsung-hdmi: Clean up fld_tg_code calculation")
Signed-off-by: Pei Xiao <xiaopei01@...inos.cn>
---
V2: change to use logical AND
---
drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
index 5eac70a1e858..7b70ea7b1599 100644
--- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
+++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
@@ -341,7 +341,8 @@ fsl_samsung_hdmi_phy_configure_pll_lock_det(struct fsl_samsung_hdmi_phy *phy,
break;
}
- writeb(FIELD_PREP(REG12_CK_DIV_MASK, div), phy->regs + PHY_REG(12));
+ /*REG12_CK_DIV_MASK only two bit, logical AND to limit range */
+ writeb(FIELD_PREP(REG12_CK_DIV_MASK, div & 0x03), phy->regs + PHY_REG(12));
/*
* Calculation for the frequency lock detector target code (fld_tg_code)
--
2.25.1
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