linux-kernel - Re: [RESEND RFC PATCH v1 2/5] arm64: Add BBM Level 2 cpu feature

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Message-ID: <86ed1lpfdh.wl-maz@kernel.org>
Date: Thu, 02 Jan 2025 12:30:34 +0000
From: Marc Zyngier <maz@...nel.org>
To: Jonathan Cameron <Jonathan.Cameron@...wei.com>
Cc: Will Deacon <will@...nel.org>,	Ryan Roberts <ryan.roberts@....com>,
	Mikołaj Lenczewski
 <miko.lenczewski@....com>,<catalin.marinas@....com>,<corbet@....net>,
 <oliver.upton@...ux.dev>,<joey.gouly@....com>,<suzuki.poulose@....com>,
 <yuzenghui@...wei.com>,<linux-arm-kernel@...ts.infradead.org>,
 <linux-doc@...r.kernel.org>,<linux-kernel@...r.kernel.org>,
 <kvmarm@...ts.linux.dev>,<yangyicong@...wei.com>,<guohanjun@...wei.com>,
 <wangkefeng.wang@...wei.com>,<liaochang1@...wei.com>,
 <sunnanyong@...wei.com>,<linuxarm@...wei.com>
Subject: Re: [RESEND RFC PATCH v1 2/5] arm64: Add BBM Level 2 cpu feature

Hi Jonathan,

On Thu, 02 Jan 2025 12:07:04 +0000,
Jonathan Cameron <Jonathan.Cameron@...wei.com> wrote:
> 
> On Thu, 19 Dec 2024 16:45:28 +0000
> Will Deacon <will@...nel.org> wrote:
> 
> > On Thu, Dec 12, 2024 at 04:03:52PM +0000, Ryan Roberts wrote:
> > > >>> If anything, this should absolutely check for FAR_EL1 and assert that
> > > >>> this is indeed caused by such change.  
> > > >>
> > > >> I'm not really sure how we would check this reliably? Without patch 5, the
> > > >> problem is somewhat constrained; we could have as many changes in flight as
> > > >> there are CPUs so we could keep a list of all the {mm_struct, VA-range} that are
> > > >> being modified. But if patch 5 is confirmed to be architecturally sound, then
> > > >> there is no "terminating tlbi" so there is no bound on the set of {mm_struct,
> > > >> VA-range}'s that could legitimately cause a conflict abort.  
> > > > 
> > > > I didn't mean to imply that we should identify the exact cause of the
> > > > abort. I was hoping to simply check that FAR_EL1 reports a userspace
> > > > VA. Why wouldn't that work?  
> > > 
> > > Ahh gottya! Yes agreed, this sounds like the right approach.  
> > 
> > Please, can we just not bother handling conflict aborts at all outside of
> > KVM? This is all dead code, it's complicated and it doesn't scale to the
> > in-kernel use-cases that others want. There's also not been any attempt
> > to add the pKVM support for handling host-side conflict aborts from what
> > I can tell.
> > 
> > For now, I would suggest limiting this series just to the KVM support
> > for handling a broken/malicious guest. If the contpte performance
> > improvements are worthwhile (I've asked for data), then let's add support
> > for the CPUs that handle the conflict in hardware (I believe this is far
> > more common than reporting the abort) so that the in-kernel users can
> > benefit whilst keeping the code manageable at the same time.
> > 
> 
> Hi All,
> 
> Given direction the discussion is going in time to raise a hand.
> 
> Huawei has implementations that support BBML2, and might report TLB conflict
> abort after changing block size directly until an appropriate TLB invalidation
> instruction completes and this Implementation Choice is architecturally compliant.

Compliant, absolutely. That's the letter of the spec. The usefulness
aspect is, however, more debatable, and this is what Will is pointing
out.

Dealing with TLB Conflict aborts is an absolute pain if you need
to handle it within the same Translation Regime and using the same
TTBR as the one that has generated the fault. So at least for the time
being, it might be preferable to only worry about the implementations
that will promise to never generate such an abort and quietly perform
an invalidation behind the kernel's back.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.