linux-kernel - [PATCH v1 3/5] riscv: dts: starfive: jh7110-common: assign 24MHz clock-frequency to uart0

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Message-ID: <20250102194530.418127-4-e@freeshell.de>
Date: Thu,  2 Jan 2025 11:45:09 -0800
From: E Shattow <e@...eshell.de>
To: Conor Dooley <conor@...nel.org>,
	Emil Renner Berthing <kernel@...il.dk>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>
Cc: linux-kernel@...r.kernel.org,
	E Shattow <e@...eshell.de>,
	linux-riscv@...ts.infradead.org,
	devicetree@...r.kernel.org
Subject: [PATCH v1 3/5] riscv: dts: starfive: jh7110-common: assign 24MHz clock-frequency to uart0

Set uart0 clock-frequency for better compatibility with operating system
and downstream boot loader SPL secondary program loader.

Signed-off-by: E Shattow <e@...eshell.de>
---
 arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
index 651f9a602226..bf2f0c34ad4e 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
@@ -636,6 +636,7 @@ GPOEN_DISABLE,
 };
 
 &uart0 {
+	clock-frequency = <24000000>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pins>;
 	status = "okay";
-- 
2.45.2