linux-kernel - [RFC PATCH v1 1/3] riscv: dts: starfive: jh7110: add timer node

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Message-ID: <20250102204137.423081-2-e@freeshell.de>
Date: Thu,  2 Jan 2025 12:41:21 -0800
From: E Shattow <e@...eshell.de>
To: Conor Dooley <conor@...nel.org>,
	Emil Renner Berthing <kernel@...il.dk>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>
Cc: linux-kernel@...r.kernel.org,
	linux-riscv@...ts.infradead.org,
	devicetree@...r.kernel.org,
	E Shattow <e@...eshell.de>
Subject: [RFC PATCH v1 1/3] riscv: dts: starfive: jh7110: add timer node

no idea if this does anything useful; not needed for boot

Signed-off-by: E Shattow <e@...eshell.de>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 0d8339357bad..0bc922b3ae8a 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -344,6 +344,15 @@ tdm_ext: tdm-ext-clock {
 		#clock-cells = <0>;
 	};
 
+	timer {
+		compatible = "riscv, timer";
+		interrupts-extended = <&cpu0_intc 5>,
+				      <&cpu1_intc 5>,
+				      <&cpu2_intc 5>,
+				      <&cpu3_intc 5>,
+				      <&cpu4_intc 5>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		interrupt-parent = <&plic>;
-- 
2.45.2