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Message-ID: <173585140656.554296.13076997282582601219.robh@kernel.org>
Date: Thu, 2 Jan 2025 14:56:47 -0600
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Thippeswamy Havalige <thippeswamy.havalige@....com>
Cc: bhelgaas@...gle.com, devicetree@...r.kernel.org,
	bharat.kumar.gogada@....com, jingoohan1@...il.com,
	michal.simek@....com, conor+dt@...nel.org, krzk+dt@...nel.org,
	linux-pci@...r.kernel.org, kw@...ux.com, lpieralisi@...nel.org,
	manivannan.sadhasivam@...aro.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 2/3] dt-bindings: PCI: amd-mdb: Add AMD Versal2 MDB
 PCIe Root Port Bridge


On Thu, 26 Dec 2024 11:30:42 +0530, Thippeswamy Havalige wrote:
> Add AMD Versal2 MDB (Multimedia DMA Bridge) PCIe Root Port Bridge.
> 
> Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@....com>
> ---
> Changes in v2:
> -------------
> - Modify patch subject.
> - Add pcie host bridge reference.
> - Modify filename as per compatible string.
> - Remove standard PCI properties.
> - Modify interrupt controller description.
> - Indentation
> 
> Changes in v3:
> -------------
> - Modified SLCR to lower case.
> - Add dwc schemas.
> - Remove common properties.
> - Move additionalProperties below properties.
> - Remove ranges property from required properties.
> - Drop blank line.
> - Modify pci@ to pcie@
> 
> Changes in v4:
> -------------
> - None.
> 
> Changes in v5:
> -------------
> - None.
> Changes in v6:
> --------------
> - Reduce dbi size to 4k.
> - update register name to slcr.
> ---
>  .../bindings/pci/amd,versal2-mdb-host.yaml         | 121 +++++++++++++++++++++
>  1 file changed, 121 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> 

Reviewed-by: Rob Herring (Arm) <robh@...nel.org>


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