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Message-ID: <20250102205846.223955-3-ivo.ivanov.ivanov1@gmail.com>
Date: Thu, 2 Jan 2025 22:58:43 +0200
From: Ivaylo Ivanov <ivo.ivanov.ivanov1@...il.com>
To: Ulf Hansson <ulf.hansson@...aro.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Alim Akhtar <alim.akhtar@...sung.com>,
Jaehoon Chung <jh80.chung@...sung.com>
Cc: linux-mmc@...r.kernel.org,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v1 2/5] arm64: dts: exynos8895: add syscon nodes for peric0/1 and fsys0/1
Add syscon nodes for peric0/1, typically used for USI, and fsys0/1,
typically used for PCI.
Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@...il.com>
---
arch/arm64/boot/dts/exynos/exynos8895.dtsi | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
index 4fb9be850..5302a8c1b 100644
--- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
@@ -228,6 +228,12 @@ cmu_peric0: clock-controller@...00000 {
"usi1", "usi2", "usi3";
};
+ syscon_peric0: syscon@...20000 {
+ compatible = "samsung,exynos8895-peric0-sysreg", "syscon";
+ reg = <0x10420000 0x2000>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_SYSREG_PERIC0_PCLK>;
+ };
+
serial_0: serial@...30000 {
compatible = "samsung,exynos8895-uart";
reg = <0x10430000 0x100>;
@@ -273,6 +279,12 @@ cmu_peric1: clock-controller@...00000 {
"usi10", "usi11", "usi12", "usi13";
};
+ syscon_peric1: syscon@...20000 {
+ compatible = "samsung,exynos8895-peric1-sysreg", "syscon";
+ reg = <0x10820000 0x2000>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK>;
+ };
+
serial_1: serial@...30000 {
compatible = "samsung,exynos8895-uart";
reg = <0x10830000 0x100>;
@@ -380,6 +392,12 @@ cmu_fsys0: clock-controller@...00000 {
"ufs", "usbdrd30";
};
+ syscon_fsys0: syscon@...20000 {
+ compatible = "samsung,exynos8895-fsys0-sysreg", "syscon";
+ reg = <0x11020000 0x2000>;
+ clocks = <&cmu_fsys0 CLK_GOUT_FSYS0_SYSREG_FSYS0_PCLK>;
+ };
+
pinctrl_fsys0: pinctrl@...50000 {
compatible = "samsung,exynos8895-pinctrl";
reg = <0x11050000 0x1000>;
@@ -398,6 +416,12 @@ cmu_fsys1: clock-controller@...00000 {
clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
};
+ syscon_fsys1: syscon@...20000 {
+ compatible = "samsung,exynos8895-fsys1-sysreg", "syscon";
+ reg = <0x11420000 0x2000>;
+ clocks = <&cmu_fsys1 CLK_GOUT_FSYS1_SYSREG_FSYS1_PCLK>;
+ };
+
pinctrl_fsys1: pinctrl@...30000 {
compatible = "samsung,exynos8895-pinctrl";
reg = <0x11430000 0x1000>;
--
2.43.0
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