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Message-ID: <9470fb05-0fc2-4bdb-9192-ae18997aff70@oss.qualcomm.com>
Date: Fri, 3 Jan 2025 13:31:53 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>, andersson@...nel.org,
konradybcio@...nel.org, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: quic_varada@...cinc.com, quic_srichara@...cinc.com
Subject: Re: [PATCH v4 2/2] arm64: dts: qcom: ipq5424: configure spi0 node for
rdp466
On 3.01.2025 7:37 AM, Manikanta Mylavarapu wrote:
> Enable the SPI0 node and configure the associated gpio pins.
>
> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
> ---
> Changes in V4:
> - Revert the 'renaming of spi0 to spi4' and follow the existing
> naming convention such as spi0 and spi1.
> - Update commit message.
>
> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 43 +++++++++++++++++++++
> 1 file changed, 43 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> index d4d31026a026..60cfa8708eb4 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> @@ -23,6 +23,36 @@ &sleep_clk {
> };
>
> &tlmm {
> + spi0_default_state: spi0-default-state {
> + clk-pins {
> + pins = "gpio6";
> + function = "spi0_clk";
> + drive-strength = <8>;
> + bias-pull-down;
> + };
> +
> + cs-pins {
> + pins = "gpio7";
> + function = "spi0_cs";
> + drive-strength = <8>;
> + bias-pull-up;
> + };
> +
> + miso-pins {
> + pins = "gpio8";
> + function = "spi0_miso";
> + drive-strength = <8>;
> + bias-pull-down;
> + };
> +
> + mosi-pins {
> + pins = "gpio9";
> + function = "spi0_mosi";
> + drive-strength = <8>;
> + bias-pull-down;
> + };
> + };
> +
> sdc_default_state: sdc-default-state {
> clk-pins {
> pins = "gpio5";
> @@ -57,3 +87,16 @@ &xo_board {
> clock-frequency = <24000000>;
> };
>
> +&spi0 {
's' < 't', please re-sort this alphabetically
Konrad
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