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Message-ID: <202501032202.m6t4wlQB-lkp@intel.com>
Date: Fri, 3 Jan 2025 22:21:09 +0800
From: kernel test robot <lkp@...el.com>
To: Vishwaroop A <va@...dia.com>, thierry.reding@...il.com,
jonathanh@...dia.com, skomatineni@...dia.com, ldewangan@...dia.com,
broonie@...nel.org, linux-spi@...r.kernel.org,
linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
kyarlagadda@...dia.com, smangipudi@...dia.com
Cc: oe-kbuild-all@...ts.linux.dev, va@...dia.com
Subject: Re: [PATCH V1 6/6] spi: tegra210-quad: Introduce native DMA support
Hi Vishwaroop,
kernel test robot noticed the following build warnings:
[auto build test WARNING on broonie-spi/for-next]
[also build test WARNING on robh/for-next broonie-sound/for-next linus/master v6.13-rc5 next-20241220]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Vishwaroop-A/arm64-tegra-Configure-QSPI-clocks-and-add-DMA/20250103-141217
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
patch link: https://lore.kernel.org/r/20250103060407.1064107-7-va%40nvidia.com
patch subject: [PATCH V1 6/6] spi: tegra210-quad: Introduce native DMA support
config: sparc-randconfig-002-20250103 (https://download.01.org/0day-ci/archive/20250103/202501032202.m6t4wlQB-lkp@intel.com/config)
compiler: sparc-linux-gcc (GCC) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250103/202501032202.m6t4wlQB-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202501032202.m6t4wlQB-lkp@intel.com/
All warnings (new ones prefixed by >>):
drivers/spi/spi-tegra210-quad.c: In function 'tegra_qspi_start_dma_based_transfer':
>> drivers/spi/spi-tegra210-quad.c:721:64: warning: right shift count >= width of type [-Wshift-count-overflow]
721 | tegra_qspi_writel(tqspi, ((rx_dma_phys >> 32) & 0xff),
| ^~
vim +721 drivers/spi/spi-tegra210-quad.c
616
617 static int tegra_qspi_start_dma_based_transfer(struct tegra_qspi *tqspi, struct spi_transfer *t)
618 {
619 struct dma_slave_config dma_sconfig = { 0 };
620 dma_addr_t rx_dma_phys, tx_dma_phys;
621 unsigned int len;
622 u8 dma_burst;
623 int ret = 0;
624 u32 val;
625 bool has_ext_dma = tqspi->soc_data->has_ext_dma;
626
627 if (tqspi->is_packed) {
628 ret = tegra_qspi_dma_map_xfer(tqspi, t);
629 if (ret < 0)
630 return ret;
631 }
632
633 val = QSPI_DMA_BLK_SET(tqspi->curr_dma_words - 1);
634 tegra_qspi_writel(tqspi, val, QSPI_DMA_BLK);
635
636 tegra_qspi_unmask_irq(tqspi);
637
638 if (tqspi->is_packed)
639 len = DIV_ROUND_UP(tqspi->curr_dma_words * tqspi->bytes_per_word, 4) * 4;
640 else
641 len = tqspi->curr_dma_words * 4;
642
643 /* set attention level based on length of transfer */
644 if (has_ext_dma) {
645 val = 0;
646 if (len & 0xf) {
647 val |= QSPI_TX_TRIG_1 | QSPI_RX_TRIG_1;
648 dma_burst = 1;
649 } else if (((len) >> 4) & 0x1) {
650 val |= QSPI_TX_TRIG_4 | QSPI_RX_TRIG_4;
651 dma_burst = 4;
652 } else {
653 val |= QSPI_TX_TRIG_8 | QSPI_RX_TRIG_8;
654 dma_burst = 8;
655 }
656
657 tegra_qspi_writel(tqspi, val, QSPI_DMA_CTL);
658 }
659
660 tqspi->dma_control_reg = val;
661
662 dma_sconfig.device_fc = true;
663
664 if ((tqspi->cur_direction & DATA_DIR_TX)) {
665 if (has_ext_dma) {
666 dma_sconfig.dst_addr = tqspi->phys + QSPI_TX_FIFO;
667 dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
668 dma_sconfig.dst_maxburst = dma_burst;
669 ret = dmaengine_slave_config(tqspi->tx_dma_chan, &dma_sconfig);
670 if (ret < 0) {
671 dev_err(tqspi->dev, "failed DMA slave config: %d\n", ret);
672 return ret;
673 }
674
675 tegra_qspi_copy_client_txbuf_to_qspi_txbuf(tqspi, t);
676 ret = tegra_qspi_start_tx_dma(tqspi, t, len);
677 if (ret < 0) {
678 dev_err(tqspi->dev, "failed to starting TX DMA: %d\n", ret);
679 return ret;
680 }
681 } else {
682 if (tqspi->is_packed)
683 tx_dma_phys = t->tx_dma;
684 else
685 tx_dma_phys = tqspi->tx_dma_phys;
686 tegra_qspi_copy_client_txbuf_to_qspi_txbuf(tqspi, t);
687 tegra_qspi_writel(tqspi, lower_32_bits(tx_dma_phys),
688 QSPI_DMA_MEM_ADDRESS_REG);
689 tegra_qspi_writel(tqspi, (upper_32_bits(tx_dma_phys) & 0xff),
690 QSPI_DMA_HI_ADDRESS_REG);
691 }
692 }
693
694 if (tqspi->cur_direction & DATA_DIR_RX) {
695 if (has_ext_dma) {
696 dma_sconfig.src_addr = tqspi->phys + QSPI_RX_FIFO;
697 dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
698 dma_sconfig.src_maxburst = dma_burst;
699 ret = dmaengine_slave_config(tqspi->rx_dma_chan, &dma_sconfig);
700 if (ret < 0) {
701 dev_err(tqspi->dev, "failed DMA slave config: %d\n", ret);
702 return ret;
703 }
704 dma_sync_single_for_device(tqspi->dev, tqspi->rx_dma_phys,
705 tqspi->dma_buf_size, DMA_FROM_DEVICE);
706 ret = tegra_qspi_start_rx_dma(tqspi, t, len);
707 if (ret < 0) {
708 dev_err(tqspi->dev, "failed to start RX DMA: %d\n", ret);
709 if (tqspi->cur_direction & DATA_DIR_TX)
710 dmaengine_terminate_all(tqspi->tx_dma_chan);
711 return ret;
712 }
713 } else {
714 if (tqspi->is_packed)
715 rx_dma_phys = t->rx_dma;
716 else
717 rx_dma_phys = tqspi->rx_dma_phys;
718
719 tegra_qspi_writel(tqspi, (rx_dma_phys & 0xffffffff),
720 QSPI_DMA_MEM_ADDRESS_REG);
> 721 tegra_qspi_writel(tqspi, ((rx_dma_phys >> 32) & 0xff),
722 QSPI_DMA_HI_ADDRESS_REG);
723 }
724 }
725
726 tegra_qspi_writel(tqspi, tqspi->command1_reg, QSPI_COMMAND1);
727
728 tqspi->is_curr_dma_xfer = true;
729 tqspi->dma_control_reg = val;
730 val |= QSPI_DMA_EN;
731 tegra_qspi_writel(tqspi, val, QSPI_DMA_CTL);
732
733 return ret;
734 }
735
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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