lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <fd95948c7c1936269d6b98ae290cd0fae0af2923.camel@surriel.com>
Date: Fri, 03 Jan 2025 13:27:41 -0500
From: Rik van Riel <riel@...riel.com>
To: Borislav Petkov <bp@...en8.de>
Cc: x86@...nel.org, linux-kernel@...r.kernel.org, kernel-team@...a.com, 
	dave.hansen@...ux.intel.com, luto@...nel.org, peterz@...radead.org, 
	tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
 akpm@...ux-foundation.org, 	nadav.amit@...il.com,
 zhengqi.arch@...edance.com, linux-mm@...ck.org
Subject: Re: [PATCH 03/12] x86/mm: add X86_FEATURE_INVLPGB definition.

On Thu, 2025-01-02 at 13:04 +0100, Borislav Petkov wrote:
> On Mon, Dec 30, 2024 at 12:53:04PM -0500, Rik van Riel wrote:
> > 
> > +++ b/arch/x86/include/asm/cpufeatures.h
> > @@ -338,6 +338,7 @@
> >  #define X86_FEATURE_CLZERO		(13*32+ 0) /* "clzero"
> > CLZERO instruction */
> >  #define X86_FEATURE_IRPERF		(13*32+ 1) /* "irperf"
> > Instructions Retired Count */
> >  #define X86_FEATURE_XSAVEERPTR		(13*32+ 2) /* "xsaveerptr"
> > Always save/restore FP error pointers */
> > +#define X86_FEATURE_INVLPGB		(13*32+ 3) /* "invlpgb"
> > INVLPGB instruction */
> 						      ^^^^^^^^^
> 
> We don't show random CPUID bits in /proc/cpuinfo anymore so you can
> remove
> that.

I still see dozens of flags in /proc/cpuinfo here on
6.11. When did that change?

> 
> >  #define X86_FEATURE_RDPRU		(13*32+ 4) /* "rdpru" Read
> > processor register at user level */
> >  #define X86_FEATURE_WBNOINVD		(13*32+ 9) /* "wbnoinvd"
> > WBNOINVD instruction */
> >  #define X86_FEATURE_AMD_IBPB		(13*32+12) /* Indirect
> > Branch Prediction Barrier */
> > -- 
> 
> Also, merge this patch with the patch which uses the flag pls.

The first real use is 3 patches further down into the
series. 

I'm not convinced things will be more readable if 4
patches get squashed down into one.

Are you sure you want that?

-- 
All Rights Reversed.

-- 
All Rights Reversed.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ