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Message-ID: <173593634037.257292.1488097273042214180.b4-ty@linaro.org>
Date: Fri,  3 Jan 2025 21:33:23 +0100
From: Bartosz Golaszewski <brgl@...ev.pl>
To: Linus Walleij <linus.walleij@...aro.org>,
	Bartosz Golaszewski <brgl@...ev.pl>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Maxime Ripard <mripard@...nel.org>,
	J. Neuschäfer <j.ne@...teo.net>
Cc: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>,
	linux-gpio@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 0/3] gpio: 74HC595 / 74x164 shift register improvements

From: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>


On Tue, 24 Dec 2024 09:02:09 +0100, J. Neuschäfer wrote:
> This patchset adds a compatible string for another part, and clarifies
> the role of the latch clock pin on 74x164-compatible shift registers.
> 
> 

Applied, thanks!

[1/3] dt-bindings: gpio: fairchild,74hc595: Add On Semi MC74HC595A compat
      commit: 0ba6cec7acbb666d28998780683deb83a3e677e3
[2/3] gpio: 74x164: Add On Semi MC74HC595A compat
      commit: b1468db9d865deb5271c9a20d05201b1c0636895
[3/3] dt-bindings: gpio: fairchild,74hc595: Document chip select vs. latch clock
      commit: b97263d14cd6400ab54f2675792b26e966e41168

Best regards,
-- 
Bartosz Golaszewski <bartosz.golaszewski@...aro.org>

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