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Message-ID: <CA+V-a8ucSHBEX+P5XDkOxEQTGv2SR-_74TH8PQDoXLyX8jx0LA@mail.gmail.com>
Date: Sat, 4 Jan 2025 08:16:46 +0000
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, 
	linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org, 
	linux-kernel@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v3 3/6] clk: renesas: rzv2h: Simplify BUS_MSTOP macros and
 field extraction

Hi Geert,

On Fri, Jan 3, 2025 at 5:08 PM Geert Uytterhoeven <geert@...ux-m68k.org> wrote:
>
> On Thu, Jan 2, 2025 at 7:18 PM Prabhakar <prabhakar.csengg@...il.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> >
> > Replace manual bit manipulation in `BUS_MSTOP` with `FIELD_PREP_CONST` and
> > `FIELD_GET` macros for better clarity and maintainability. Introduce
> > explicit masks (`BUS_MSTOP_IDX_MASK`, `BUS_MSTOP_BITS_MASK`) to improve
> > readability.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
> > ---
> > v2->v3
> > - Dropped unnecessary parentheses
> > - Included RB tag from Geert
>
> Thanks, will queue in renesas-clk for v6.14, with
>
> --- a/drivers/clk/renesas/rzv2h-cpg.h
> +++ b/drivers/clk/renesas/rzv2h-cpg.h
> @@ -8,6 +8,8 @@
>  #ifndef __RENESAS_RZV2H_CPG_H__
>  #define __RENESAS_RZV2H_CPG_H__
>
> +#include <linux/bitfield.h>
> +
>  /**
>   * struct ddiv - Structure for dynamic switching divider
>   *
>
Thanks for taking care of this.

Cheers,
Prabhakar

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