[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <48373519-2867-419d-9f51-e7bd330b311c@quicinc.com>
Date: Tue, 7 Jan 2025 01:40:47 +0530
From: Akhil P Oommen <quic_akhilpo@...cinc.com>
To: Rob Clark <robdclark@...il.com>, <iommu@...ts.linux.dev>
CC: <linux-arm-msm@...r.kernel.org>, <freedreno@...ts.freedesktop.org>,
Robin
Murphy <robin.murphy@....com>, Will Deacon <will@...nel.org>,
Rob Clark
<robdclark@...omium.org>, Joerg Roedel <joro@...tes.org>,
"moderated list:ARM
SMMU DRIVERS" <linux-arm-kernel@...ts.infradead.org>,
open list
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] iommu/arm-smmu-qcom: Only enable stall on smmu-v2
On 1/3/2025 1:00 AM, Akhil P Oommen wrote:
> On 1/3/2025 12:02 AM, Rob Clark wrote:
>> From: Rob Clark <robdclark@...omium.org>
>>
>> On mmu-500, stall-on-fault seems to stall all context banks, causing the
>> GMU to misbehave. So limit this feature to smmu-v2 for now.
>>
>> This fixes an issue with an older mesa bug taking outo the system
>> because of GMU going off into the weeds.
>>
>> What we _think_ is happening is that, if the GPU generates 1000's of
>> faults at ~once (which is something that GPUs can be good at), it can
>> result in a sufficient number of stalled translations preventing other
>> transactions from entering the same TBU.
>>
>> Signed-off-by: Rob Clark <robdclark@...omium.org>
>
> Reviewed-by: Akhil P Oommen <quic_akhilpo@...cinc.com>
>
Btw, if stall is not enabled, I think there is no point in capturing
coredump from adreno pagefault handler. By the time we start coredump,
gpu might have switched context.
-Akhil.
> -Akhil
>
Powered by blists - more mailing lists