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Message-ID: <20250106205607.GA132098@bhelgaas>
Date: Mon, 6 Jan 2025 14:56:07 -0600
From: Bjorn Helgaas <helgaas@...nel.org>
To: Nícolas F. R. A. Prado <nfraprado@...labora.com>
Cc: Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
kernel@...labora.com, Chen-Yu Tsai <wenst@...omium.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-mediatek@...ts.infradead.org,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Subject: Re: [PATCH v4 14/19] arm64: dts: mediatek: asurada: Enable PCIe and
add WiFi
[+cc Mani]
On Mon, Jan 06, 2025 at 04:10:32PM -0300, Nícolas F. R. A. Prado wrote:
> On Fri, Jan 03, 2025 at 03:14:46PM -0600, Bjorn Helgaas wrote:
> > On Wed, Jun 29, 2022 at 11:59:51AM -0400, Nícolas F. R. A. Prado wrote:
> > > Enable MT8192's PCIe controller and add support for the MT7921e WiFi
> > > card that is present on that bus for the Asurada platform.
> >
> > > +&pcie {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pcie_pins>;
> > > +
> > > + pcie0: pcie@0,0 {
> > > + device_type = "pci";
> > > + reg = <0x0000 0 0 0 0>;
> > > + num-lanes = <1>;
> > > + bus-range = <0x1 0x1>;
> >
> > Hi Nícolas, what's the purpose of this bus-range? IIUC this describes
> > a Root Port, where we can read and configure the secondary/subordinate
> > bus numbers from the RP config space, so it seems like we don't need
> > to describe them here.
>
> Hi Bjorn,
>
> that was carried over from the downstream sources. I just tried
> removing it and indeed I don't see any difference in the PCI log
> messages, or the bus number, and the wifi works just fine. I can
> send a follow up patch removing it.
There might be a DTC check issue if we remove the bus-range:
https://lore.kernel.org/r/20250105101612.t6c4pw5uxhb5rdde@thinkpad
We might need to figure out how to resolve that first.
Bjorn
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