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Message-ID: <44tjbxjrigbfu4dfrlbvdprablyhf3i5u4fvg3iwucfvmvljqv@t43py5mb4rg3>
Date: Mon, 6 Jan 2025 17:59:01 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Wasim Nazir <quic_wasimn@...cinc.com>
Cc: Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
kernel@...cinc.com
Subject: Re: [PATCH v5 5/6] arm64: dts: qcom: Add support for QCS9075 Ride &
Ride-r3
On Sun, Dec 29, 2024 at 08:53:31PM +0530, Wasim Nazir wrote:
> Add device tree support for QCS9075 Ride & Ride-r3 boards.
>
> QCS9075 lacks the safety monitoring features of Safety-Island (SAIL)
> subsystem which is available in QCS9100, and it affects thermal
> management.
>
> Also, between ride and ride-r3 ethernet phy is different.
> Ride uses 1G ethernet phy while ride-r3 uses 2.5G ethernet phy.
>
This commit message is written under the assumption that the reader
first reads the patch, to determine what QCS9075 subtracts features
from.
Please describe what the QCS9075 Ride and Ride R3 are, if it's just a
variant of QCS9100 without SAIL, write that - and if that is all the
difference, then Dmitry's request makes total sense.
Also, subject prefix doesn't match upstream style. Prefix with the
subsystem/platform/device and avoid "for XYZ". See "git log" on a few
of the other files to see how it should look like.
Thanks,
Bjorn
> Signed-off-by: Wasim Nazir <quic_wasimn@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 2 +
> arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 46 ++++++++++++++++++++
> arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 46 ++++++++++++++++++++
> 3 files changed, 94 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts
> create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index 78613a1bd34a..41cb2bbd3472 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -118,6 +118,8 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs9075-rb8.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride-r3.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb
> diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts
> new file mode 100644
> index 000000000000..d9a8956d3a76
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts
> @@ -0,0 +1,46 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +/dts-v1/;
> +
> +#include "sa8775p-ride.dtsi"
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. QCS9075 Ride Rev3";
> + compatible = "qcom,qcs9075-ride-r3", "qcom,qcs9075", "qcom,sa8775p";
> +};
> +
> +ðernet0 {
> + phy-mode = "2500base-x";
> +};
> +
> +ðernet1 {
> + phy-mode = "2500base-x";
> +};
> +
> +&mdio {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + sgmii_phy0: phy@8 {
> + compatible = "ethernet-phy-id31c3.1c33";
> + reg = <0x8>;
> + device_type = "ethernet-phy";
> + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>;
> + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
> + reset-assert-us = <11000>;
> + reset-deassert-us = <70000>;
> + };
> +
> + sgmii_phy1: phy@0 {
> + compatible = "ethernet-phy-id31c3.1c33";
> + reg = <0x0>;
> + device_type = "ethernet-phy";
> + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>;
> + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
> + reset-assert-us = <11000>;
> + reset-deassert-us = <70000>;
> + };
> +};
> diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts
> new file mode 100644
> index 000000000000..3b524359a72d
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts
> @@ -0,0 +1,46 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +/dts-v1/;
> +
> +#include "sa8775p-ride.dtsi"
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. QCS9075 Ride";
> + compatible = "qcom,qcs9075-ride", "qcom,qcs9075", "qcom,sa8775p";
> +};
> +
> +ðernet0 {
> + phy-mode = "sgmii";
> +};
> +
> +ðernet1 {
> + phy-mode = "sgmii";
> +};
> +
> +&mdio {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + sgmii_phy0: phy@8 {
> + compatible = "ethernet-phy-id0141.0dd4";
> + reg = <0x8>;
> + device_type = "ethernet-phy";
> + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>;
> + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
> + reset-assert-us = <11000>;
> + reset-deassert-us = <70000>;
> + };
> +
> + sgmii_phy1: phy@a {
> + compatible = "ethernet-phy-id0141.0dd4";
> + reg = <0xa>;
> + device_type = "ethernet-phy";
> + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>;
> + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
> + reset-assert-us = <11000>;
> + reset-deassert-us = <70000>;
> + };
> +};
> --
> 2.47.0
>
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