linux-kernel - Re: [PATCH v2 2/3] ARM: dts: st: add node for the MALI gpu on stih410.dtsi

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Message-ID: <13598662-b9ee-4dc6-93be-a54842c90c18@foss.st.com>
Date: Mon, 6 Jan 2025 11:39:11 +0100
From: Patrice CHOTARD <patrice.chotard@...s.st.com>
To: Alain Volmat <avolmat@...com>, David Airlie <airlied@...il.com>,
        Daniel
 Vetter <daniel@...ll.ch>,
        Maarten Lankhorst
	<maarten.lankhorst@...ux.intel.com>,
        Maxime Ripard <mripard@...nel.org>,
        Thomas Zimmermann <tzimmermann@...e.de>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>
CC: <dri-devel@...ts.freedesktop.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 2/3] ARM: dts: st: add node for the MALI gpu on
 stih410.dtsi



On 10/6/24 22:42, Alain Volmat wrote:
> Add the entry for the GPU (Mali400) on the stih410.dtsi
> 
> Signed-off-by: Alain Volmat <avolmat@...com>
> ---
>  arch/arm/boot/dts/st/stih410.dtsi | 34 ++++++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/st/stih410.dtsi b/arch/arm/boot/dts/st/stih410.dtsi
> index a69231854f783b1b9fd685ba2822eb406e0ffdf5..d56343f44fda4e9e1de2e5efc86e2d984bad14b4 100644
> --- a/arch/arm/boot/dts/st/stih410.dtsi
> +++ b/arch/arm/boot/dts/st/stih410.dtsi
> @@ -285,5 +285,39 @@ cec@...087c {
>  			resets = <&softreset STIH407_LPM_SOFTRESET>;
>  			hdmi-phandle = <&sti_hdmi>;
>  		};
> +
> +		gpu: gpu@...0000 {
> +			compatible = "st,stih410-mali", "arm,mali-400";
> +			reg = <0x9f00000 0x10000>;
> +			/* LIMA driver needs 2 clocks, use the same for both */
> +			clocks = <&clk_s_c0_flexgen CLK_ICN_GPU>,
> +				 <&clk_s_c0_flexgen CLK_ICN_GPU>;
> +			clock-names = "bus", "core";
> +			assigned-clocks = <&clk_s_c0_flexgen CLK_ICN_GPU>;
> +			assigned-clock-rates = <400000000>;
> +			resets = <&softreset STIH407_GPU_SOFTRESET>;
> +			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "gp",
> +					  "gpmmu",
> +					  "pp0",
> +					  "ppmmu0",
> +					  "pp1",
> +					  "ppmmu1",
> +					  "pp2",
> +					  "ppmmu2",
> +					  "pp3",
> +					  "ppmmu3";
> +
> +			status = "disabled";
> +		};
>  	};
>  };
> 
Hi Alain

Reviewed-by: Patrice Chotard <patrice.chotard@...s.st.com>

Thanks
PAtrice