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Message-Id: <20250106-skov-dt-updates-v2-8-4504d3f00ecb@pengutronix.de>
Date: Mon, 06 Jan 2025 17:06:43 +0100
From: Ahmad Fatoum <a.fatoum@...gutronix.de>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Oleksij Rempel <o.rempel@...gutronix.de>
Cc: devicetree@...r.kernel.org, imx@...ts.linux.dev,
Frank Li <Frank.li@....com>, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, kernel@...gutronix.de,
Ahmad Fatoum <a.fatoum@...gutronix.de>
Subject: [PATCH v2 08/10] arm64: dts: imx8mp-skov: describe mains fail
detection
From: Oleksij Rempel <o.rempel@...gutronix.de>
The main 24V regulator will toggle GPIO4_IO23 to signal imminent voltage
loss. Reflect this in the DT, so the OS can take appropriate action when
this happens.
Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de>
Signed-off-by: Ahmad Fatoum <a.fatoum@...gutronix.de>
---
v1 -> v2:
- no change
---
arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi
index bce23d62cd277b89ec9ce5ed3651cfe787987158..80d212acc0c33af0b2a812e0b03b36dbb6b3b3fd 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi
@@ -116,6 +116,11 @@ reg_24v: regulator-24v {
regulator-name = "24V";
regulator-min-microvolt = <24000000>;
regulator-max-microvolt = <24000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reg24v>;
+ interrupts-extended = <&gpio4 23 IRQ_TYPE_EDGE_FALLING>;
+ system-critical-regulator;
+ regulator-uv-less-critical-window-ms = <50>;
};
reg_can2rs: regulator-can2rs {
@@ -591,6 +596,12 @@ MX8MP_IOMUXC_SAI3_MCLK__PWM4_OUT 0x116
>;
};
+ pinctrl_reg24v: reg24vgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23 0x154
+ >;
+ };
+
pinctrl_reg_vsd_3v3: regvsd3v3grp {
fsl,pins = <
MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
--
2.39.5
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