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Message-ID: <173626793405.69400.2154688101885924121.b4-ty@kernel.org>
Date: Tue,  7 Jan 2025 10:38:54 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: ulf.hansson@...aro.org,
	robh@...nel.org,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	bhupesh.sharma@...aro.org,
	konradybcio@...nel.org,
	Yuanjie Yang <quic_yuanjiey@...cinc.com>
Cc: linux-mmc@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-arm-msm@...r.kernel.org,
	quic_tingweiz@...cinc.com
Subject: Re: [PATCH v5 0/2] Enable SDHC1 and SDHC2 on QCS615


On Tue, 17 Dec 2024 18:10:15 +0800, Yuanjie Yang wrote:
> Add SDHC1 and SDHC2 support to the QCS615 Ride platform. The
> SDHC1 and SDHC2 of QCS615 are derived from SM6115. Include
> the configuration of SDHC1-related and SDHC2-related opp,
> power, and interconnect settings in the device tree.
> 
> 

Applied, thanks!

[1/2] arm64: dts: qcom: qcs615: add SDHC1 and SDHC2
      commit: 8009de059f8693142c651980cef07668917971c2
[2/2] arm64: dts: qcom: qcs615-ride: enable SDHC1 and SDHC2
      commit: 50f54d4fa3f4827d824b971485b0691e0985d0ba

Best regards,
-- 
Bjorn Andersson <andersson@...nel.org>

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