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Message-Id: <173625436399.258197.10961901698600591079.b4-ty@kernel.org>
Date: Tue,  7 Jan 2025 16:42:39 +0000
From: Will Deacon <will@...nel.org>
To: robdclark@...il.com,
	robin.murphy@....com,
	joro@...tes.org,
	jgg@...pe.ca,
	jsnitsel@...hat.com,
	robh@...nel.org,
	krzysztof.kozlowski@...aro.org,
	quic_c_gdjako@...cinc.com,
	dmitry.baryshkov@...aro.org,
	Bibek Kumar Patro <quic_bibekkum@...cinc.com>
Cc: catalin.marinas@....com,
	kernel-team@...roid.com,
	Will Deacon <will@...nel.org>,
	iommu@...ts.linux.dev,
	linux-arm-msm@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v18 0/5] iommu/arm-smmu: introduction of ACTLR implementation for Qualcomm SoCs

On Thu, 12 Dec 2024 20:43:57 +0530, Bibek Kumar Patro wrote:
> This patch series consist of six parts and covers the following:
> 
> 1. Provide option to re-enable context caching to retain prefetcher
>    settings during reset and runtime suspend.
> 
> 2. Remove cfg inside qcom_smmu structure and replace it with single
>    pointer to qcom_smmu_match_data avoiding replication of multiple
>    members from same.
> 
> [...]

Applied to iommu (arm/smmu/updates), thanks!

[1/5] iommu/arm-smmu: Re-enable context caching in smmu reset operation
      https://git.kernel.org/iommu/c/ef4144b1b47d
[2/5] iommu/arm-smmu: Refactor qcom_smmu structure to include single pointer
      https://git.kernel.org/iommu/c/445d7a8ed90e
[3/5] iommu/arm-smmu: Add support for PRR bit setup
      https://git.kernel.org/iommu/c/7f2ef1bfc758
[4/5] iommu/arm-smmu: Introduce ACTLR custom prefetcher settings
      https://git.kernel.org/iommu/c/9fe18d825a58
[5/5] iommu/arm-smmu: Add ACTLR data and support for qcom_smmu_500
      https://git.kernel.org/iommu/c/3e35c3e725de

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev

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