linux-kernel - Re: [PATCH 2/4] drm/msm/dpu: enable CDM_0 for all DPUs which are known to have it

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Message-ID: <6d149872-7c3e-4bcc-b2ed-39ecb8faaaee@quicinc.com>
Date: Tue, 7 Jan 2025 15:34:09 -0800
From: Abhinav Kumar <quic_abhinavk@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        Rob Clark
	<robdclark@...il.com>, Sean Paul <sean@...rly.run>,
        Marijn Suijten
	<marijn.suijten@...ainline.org>,
        David Airlie <airlied@...il.com>, Simona
 Vetter <simona@...ll.ch>
CC: <linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
        <freedreno@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/4] drm/msm/dpu: enable CDM_0 for all DPUs which are
 known to have it



On 12/23/2024 8:25 PM, Dmitry Baryshkov wrote:
> Enable the CDM_0 block on all DPU generations which have the CDM block
> documented in the vendor dtsi file.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h  | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h  | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h  | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h   | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h   | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h   | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h   | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h   | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h  | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h   | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h   | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h   | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h   | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h   | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h   | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h   | 1 +
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h   | 1 +
>   20 files changed, 20 insertions(+)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
> index eb5dfff2ec4f48d793f9d83aafed592d0947f04b..581c9bb4b193280fd6b7c8cc4e3ef8b2e9e95dfb 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
> @@ -431,6 +431,7 @@ const struct dpu_mdss_cfg dpu_sm8650_cfg = {
>   	.mdss_ver = &sm8650_mdss_ver,
>   	.caps = &sm8650_dpu_caps,
>   	.mdp = &sm8650_mdp,
> +	.cdm = &dpu_cdm_0,
>   	.ctl_count = ARRAY_SIZE(sm8650_ctl),
>   	.ctl = sm8650_ctl,
>   	.sspp_count = ARRAY_SIZE(sm8650_sspp),
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h
> index ab3dfb0b374ead36c7f07b0a77c703fb2c09ff8a..f6ee09a148c214bce7bae2c7df868d95c4cf9833 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h
> @@ -190,6 +190,7 @@ const struct dpu_mdss_cfg dpu_msm8937_cfg = {
>   	.mdss_ver = &msm8937_mdss_ver,
>   	.caps = &msm8937_dpu_caps,
>   	.mdp = msm8937_mdp,
> +	.cdm = &dpu_cdm_0,
>   	.ctl_count = ARRAY_SIZE(msm8937_ctl),
>   	.ctl = msm8937_ctl,
>   	.sspp_count = ARRAY_SIZE(msm8937_sspp),

This is not correct. the CDM block on msm8937 goes only upto length 
0x224 and not 0x228.

On these chipsets, the CDM block only goes till 0x224 and not 0x228:

1) msm8937
2) msm8917
3) msm8953
4) msm8996
5) msm8998
6) sdm660
7) sdm630
8) sdm845
9) sdm670

On the rest of the chipsets on this patch it goes till 0x228. So we will 
need two entries in the catalog, maybe cdm_with_input_mux and just cdm 
as the last register is cdm_mux.