linux-kernel - RE: [PATCH] arm64: dts: socfpga: agilex5: add clock-names property to nand node

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Message-ID: <BL3PR11MB65326A8A7F2E413B0D8162A6A2112@BL3PR11MB6532.namprd11.prod.outlook.com>
Date: Tue, 7 Jan 2025 10:21:42 +0000
From: "Rabara, Niravkumar L" <niravkumar.l.rabara@...el.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Dinh Nguyen <dinguyen@...nel.org>,
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH] arm64: dts: socfpga: agilex5: add clock-names property to
 nand node



> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@...nel.org>
> Sent: Tuesday, 7 January, 2025 5:21 PM
> To: Rabara, Niravkumar L <niravkumar.l.rabara@...el.com>; Dinh Nguyen
> <dinguyen@...nel.org>; Rob Herring <robh@...nel.org>; Krzysztof Kozlowski
> <krzk+dt@...nel.org>; Conor Dooley <conor+dt@...nel.org>;
> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org
> Subject: Re: [PATCH] arm64: dts: socfpga: agilex5: add clock-names property
> to nand node
> 
> On 07/01/2025 09:49, niravkumar.l.rabara@...el.com wrote:
> > From: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> >
> > Cadence nand controller driver requires clock-names = "nf_clk" property.
> >
> 
> Fixes tag.
> 
> > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> > ---
> >  arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > index 51c6e19e40b8..4357572e96e3 100644
> > --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > @@ -272,6 +272,7 @@ nand: nand-controller@...80000 {
> >  			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
> >  			clocks = <&clkmgr AGILEX5_NAND_NF_CLK>;
> >  			cdns,board-delay-ps = <4830>;
> > +			clock-names = "nf_clk";
> 
> It does not look like you tested the DTS against bindings. Please run `make
> dtbs_check W=1` (see Documentation/devicetree/bindings/writing-
> schema.rst or https://www.linaro.org/blog/tips-and-tricks-for-validating-
> devicetree-sources-with-the-devicetree-schema/
> for instructions).
> Maybe you need to update your dtschema and yamllint. Don't rely on distro
> packages for dtschema and be sure you are using the latest released
> dtschema.

I believe you are pointing to this error message
/soc@...and-controller@...80000: failed to match any schema with
compatible: ['cdns,hp-nfc']

I have already converted Cadence NAND controller txt to yaml bindings.
https://lore.kernel.org/all/20241209081826.1242214-1-niravkumar.l.rabara@intel.com/
This patch is applied to nand/next and fixed the ['cdns,hp-nfc'] error. 

I will mention this binding patch as dependency in v2 patch. 

> 
> Best regards,
> Krzysztof