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Message-ID: <88f8feee-9cac-47d7-9a8d-3c118e26d124@wolfvision.net>
Date: Tue, 7 Jan 2025 12:07:42 +0100
From: Michael Riesch <michael.riesch@...fvision.net>
To: Rob Herring <robh@...nel.org>
Cc: Mehdi Djait <mehdi.djait@...ux.intel.com>,
Maxime Chevallier <maxime.chevallier@...tlin.com>,
Théo Lebrun <theo.lebrun@...tlin.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>,
Kever Yang <kever.yang@...k-chips.com>,
Nicolas Dufresne <nicolas@...fresne.ca>,
Sebastian Fricke <sebastian.fricke@...labora.com>,
Alexander Shiyan <eagle.alexander923@...il.com>,
Val Packett <val@...kett.cool>, Philipp Zabel <p.zabel@...gutronix.de>,
Sakari Ailus <sakari.ailus@...ux.intel.com>, linux-media@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org
Subject: Re: [PATCH v2 3/6] media: dt-bindings: media: add bindings for
rockchip rk3568 vicap
Hi Rob,
On 12/30/24 21:08, Rob Herring wrote:
> On Tue, Dec 17, 2024 at 04:55:15PM +0100, Michael Riesch wrote:
> [...]
>> + ports:
>> + $ref: /schemas/graph.yaml#/properties/ports
>> +
>> + properties:
>> + port@0:
>> + $ref: /schemas/graph.yaml#/$defs/port-base
>> + unevaluatedProperties: false
>> + description: input port on the parallel interface
>
> What about the CSI-2 interface?
If it is OK to add it to binding already although there is nothing in
the driver code that uses it, I will be happy to add it in v3.
Otherwise, I'll add it together with the actual MIPI CSI-2 support.
>
>> [...]
>> +examples:
>> + - |
>> + #include <dt-bindings/clock/rk3568-cru.h>
>> + #include <dt-bindings/interrupt-controller/arm-gic.h>
>> + #include <dt-bindings/interrupt-controller/irq.h>
>> + #include <dt-bindings/power/rk3568-power.h>
>> + #include <dt-bindings/media/video-interfaces.h>
>> +
>> + parent {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> +
>> + vicap: video-capture@...e0000 {
>> + compatible = "rockchip,rk3568-vicap";
>> + reg = <0x0 0xfdfe0000 0x0 0x200>;
>> + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
>> + assigned-clocks = <&cru DCLK_VICAP>;
>> + assigned-clock-rates = <300000000>;
>> + clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>,
>> + <&cru DCLK_VICAP>, <&cru ICLK_VICAP_G>;
>> + clock-names = "aclk", "hclk", "dclk", "iclk";
>> + iommus = <&vicap_mmu>;
>> + power-domains = <&power RK3568_PD_VI>;
>> + resets = <&cru SRST_A_VICAP>, <&cru SRST_H_VICAP>,
>> + <&cru SRST_D_VICAP>, <&cru SRST_P_VICAP>,
>> + <&cru SRST_I_VICAP>;
>> + reset-names = "arst", "hrst", "drst", "prst", "irst";
>> + rockchip,grf = <&grf>;
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + vicap_dvp: port@0 {
>> + reg = <0>;
>> +
>> + vicap_dvp_input: endpoint {
>> + bus-type = <MEDIA_BUS_TYPE_BT656>;
>> + bus-width = <16>;
>> + pclk-sample = <MEDIA_PCLK_SAMPLE_DUAL_EDGE>;
>> + remote-endpoint = <&it6801_output>;
>> + };
>> + };
>> +
>> + vicap_mipi: port@1 {
>> + reg = <1>;
>> + };
>> + };
>> + };
>> +
>> + vicap_mmu: iommu@...e0800 {
>> + compatible = "rockchip,rk3568-iommu";
>
> Not part of this binding, so drop this node.
Ack, will remove in v3.
Thanks and regards,
Michael
>
>> + reg = <0x0 0xfdfe0800 0x0 0x100>;
>> + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>;
>> + clock-names = "aclk", "iface";
>> + #iommu-cells = <0>;
>> + power-domains = <&power RK3568_PD_VI>;
>> + rockchip,disable-mmu-reset;
>> + };
>> + };
>> +...
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 1138c8858bc7..8dbeb2927a08 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -20223,6 +20223,7 @@ M: Michael Riesch <michael.riesch@...fvision.net>
>> L: linux-media@...r.kernel.org
>> S: Maintained
>> F: Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
>> +F: Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml
>>
>> ROCKCHIP CRYPTO DRIVERS
>> M: Corentin Labbe <clabbe@...libre.com>
>>
>> --
>> 2.34.1
>>
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