[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250107142605.6c605eaf@kmaincent-XPS-13-7390>
Date: Tue, 7 Jan 2025 14:26:05 +0100
From: Kory Maincent <kory.maincent@...tlin.com>
To: Oleksij Rempel <o.rempel@...gutronix.de>
Cc: "Russell King (Oracle)" <linux@...linux.org.uk>, Maxime Chevallier
<maxime.chevallier@...tlin.com>, davem@...emloft.net,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
thomas.petazzoni@...tlin.com, Andrew Lunn <andrew@...n.ch>, Jakub Kicinski
<kuba@...nel.org>, Eric Dumazet <edumazet@...gle.com>, Paolo Abeni
<pabeni@...hat.com>, linux-arm-kernel@...ts.infradead.org, Christophe Leroy
<christophe.leroy@...roup.eu>, Herve Codina <herve.codina@...tlin.com>,
Florian Fainelli <f.fainelli@...il.com>, Heiner Kallweit
<hkallweit1@...il.com>, Vladimir Oltean <vladimir.oltean@....com>, Marek
Behún <kabel@...nel.org>, Nicolò Veronese
<nicveronese@...il.com>, Simon Horman <horms@...nel.org>,
mwojtas@...omium.org, Antoine Tenart <atenart@...nel.org>
Subject: Re: [PATCH net-next RFC 0/5] net: phy: Introduce a port
representation
On Thu, 2 Jan 2025 18:03:52 +0100
Oleksij Rempel <o.rempel@...gutronix.de> wrote:
> On Thu, Jan 02, 2025 at 10:48:05AM +0000, Russell King (Oracle) wrote:
> > On Sun, Dec 22, 2024 at 07:54:37PM +0100, Oleksij Rempel wrote:
> > > Here is updated version:
> > >
> > > ports {
> > > /* 1000BaseT Port with Ethernet and simple PoE */
> > > port0: ethernet-port@0 {
> > > reg = <0>; /* Port index */
> > > label = "ETH0"; /* Physical label on the device */
> > > connector = "RJ45"; /* Connector type */
> > > supported-modes = <10BaseT 100BaseTX 1000BaseT>; /* Supported
> > > modes */
> > >
> > > transformer {
> > > model = "ABC123"; /* Transformer model number */
> > > manufacturer = "TransformerCo"; /* Manufacturer name */
> > >
> > > pairs {
> > > pair@0 {
> > > name = "A"; /* Pair A */
> > > pins = <1 2>; /* Connector pins */
> > > phy-mapping = <PHY_TX0_P PHY_TX0_N>; /* PHY pin
> > > mapping */ center-tap = "CT0"; /* Central tap identifier */
> > > pse-negative = <PSE_GND>; /* CT0 connected to GND */
> > > };
> > > pair@1 {
> > > name = "B"; /* Pair B */
> > > pins = <3 6>; /* Connector pins */
> > > phy-mapping = <PHY_RX0_P PHY_RX0_N>;
> > > center-tap = "CT1"; /* Central tap identifier */
> > > pse-positive = <PSE_OUT0>; /* CT1 connected to
> > > PSE_OUT0 */ };
> > > pair@2 {
> > > name = "C"; /* Pair C */
> > > pins = <4 5>; /* Connector pins */
> > > phy-mapping = <PHY_TXRX1_P PHY_TXRX1_N>; /* PHY
> > > connection only */ center-tap = "CT2"; /* Central tap identifier */
> > > /* No power connection to CT2 */
> > > };
> > > pair@3 {
> > > name = "D"; /* Pair D */
> > > pins = <7 8>; /* Connector pins */
> > > phy-mapping = <PHY_TXRX2_P PHY_TXRX2_N>; /* PHY
> > > connection only */ center-tap = "CT3"; /* Central tap identifier */
> > > /* No power connection to CT3 */
> > > };
> > > };
> > > };
Couldn't we begin with something simple like the following and add all the
transformers and pairs information as you described later if the community feels
we need it?
mdis {
/* 1000BaseT Port with Ethernet and PoE */
mdi0: ethernet-mdi@0 {
reg = <0>; /* Port index */
label = "ETH0"; /* Physical label on the device */
connector = "RJ45"; /* Connector type */
supported-modes = <10BaseT 100BaseTX 1000BaseT>; /* Supported modes */
lanes = <2>;
variant = "MDI-X"; /* MDI or MDI-X */
pse = <&pse1>;
};
};
We can also add led, thermal and fuse subnodes later.
Let's begin with something simple for the initial support, considering
that it has places for additional details in the future.
Regards,
--
Köry Maincent, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com
Powered by blists - more mailing lists