linux-kernel - Re: (subset) [PATCH v5 0/3] riscv: spacemit: add pinctrl support to K1 SoC

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Message-ID: <173595809801.25800.8363611457846698976.b4-ty@gentoo.org>
Date: Wed,  8 Jan 2025 21:36:22 +0800
From: Yixun Lan <dlan@...too.org>
To: Linus Walleij <linus.walleij@...aro.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Conor Dooley <conor@...nel.org>,
	Yixun Lan <dlan@...too.org>
Cc: Yangyu Chen <cyy@...self.name>,
	Jesse Taube <mr.bossman075@...il.com>,
	Jisheng Zhang <jszhang@...nel.org>,
	Inochi Amaoto <inochiama@...look.com>,
	Icenowy Zheng <uwu@...nowy.me>,
	Meng Zhang <zhangmeng.kevin@...ux.spacemit.com>,
	devicetree@...r.kernel.org,
	linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	linux-gpio@...r.kernel.org
Subject: Re: (subset) [PATCH v5 0/3] riscv: spacemit: add pinctrl support to K1 SoC


On Wed, 16 Oct 2024 08:59:40 +0800, Yixun Lan wrote:
> This series adds pinctrl support to SpacemiT's K1 SoC, the controller
> uses a single register to describe all pin functions, including
> bias pull up/down, drive strength, schmitter trigger, slew rate,
> strong pull-up, mux mode. In patch #3, we add the pinctrl property of
> uart device for the Bananapi-F3 board.
> 
> You can find the pinctrl docs of K1 here[1], and the original vendor's
> pinctrl dts data here[2].
> 
> [...]

Thanks, Applied to SpacemiT's SoC tree:
 https://github.com/spacemit-com/linux/ (for-next)

[3/3] riscv: dts: spacemit: add pinctrl property to uart0 in BPI-F3
      commit: e7cd95ad8013bc232316bba0a52ea11ecd5c81bd

The for-next branch will be sent via a formal Pull Request to
the Linux SoC maintainers for inclusion in next merge window.

Best regards,
-- 
Yixun Lan