linux-kernel - Re: [PATCH 0/7] arm64/boot: Enable EL2 requirements for FEAT

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Message-ID: <CAL_JsqKKiEOj=a1k6U-bB0F6-ht7QokDnh3bspHupp-QG=haSg@mail.gmail.com>
Date: Wed, 8 Jan 2025 07:47:16 -0600
From: Rob Herring <robh@...nel.org>
To: Marc Zyngier <maz@...nel.org>
Cc: Catalin Marinas <catalin.marinas@....com>, Anshuman Khandual <anshuman.khandual@....com>, 
	linux-arm-kernel@...ts.infradead.org, Will Deacon <will@...nel.org>, 
	Ryan Roberts <ryan.roberts@....com>, Mark Rutland <mark.rutland@....com>, 
	Oliver Upton <oliver.upton@...ux.dev>, Jonathan Corbet <corbet@....net>, 
	Eric Auger <eric.auger@...hat.com>, kvmarm@...ts.linux.dev, linux-doc@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/7] arm64/boot: Enable EL2 requirements for FEAT_PMUv3p9

On Wed, Jan 8, 2025 at 5:15 AM Marc Zyngier <maz@...nel.org> wrote:
>
> On Tue, 07 Jan 2025 22:13:47 +0000,
> Rob Herring <robh@...nel.org> wrote:
> >
> > On Tue, Jan 7, 2025 at 6:13 AM Catalin Marinas <catalin.marinas@....com> wrote:
> > >
> > > On Thu, Jan 02, 2025 at 10:04:02AM -0600, Rob Herring wrote:
> > > > On Fri, Dec 20, 2024 at 12:52:33PM +0530, Anshuman Khandual wrote:
> > > > > This series adds fine grained trap control in EL2 required for FEAT_PMUv3p9
> > > > > registers like PMICNTR_EL0, PMICFILTR_EL0, and PMUACR_EL1 which are already
> > > > > being used in the kernel. This is required to prevent their EL1 access trap
> > > > > into EL2.
> > > > >
> > > > > PMZR_EL0 register trap control i.e HDFGWTR2_EL2.nPMZR_EL0 remains unchanged
> > > > > for now as it does not get accessed in the kernel, and there is no plan for
> > > > > its access from user space.
> > > > >
> > > > > I have taken the liberty to pick up all the review tags for patches related
> > > > > to tools sysreg update from the KVM FGT2 V2 patch series posted earlier.
> > > > >
> > > > > https://lore.kernel.org/all/20241210055311.780688-1-anshuman.khandual@arm.com/
> > > > >
> > > > > Rob had earler mentioned about FEAT_FGT2 based trap control requirement for
> > > > > FEAT_PMUv3p9 registers that are currently being used in kernel. The context
> > > > > can be found here.
> > > > >
> > > > > https://lore.kernel.org/all/20241216234251.GA629562-robh@kernel.org/
> > > > >
> > > > > This series is based on v6.13-rc3
> > > > >
> > > > > Cc: Catalin Marinas <catalin.marinas@....com>
> > > > > Cc: Will Deacon <will@...nel.org>
> > > > > Cc: Marc Zyngier <maz@...nel.org>
> > > > > Cc: Ryan Roberts <ryan.roberts@....com>
> > > > > Cc: Mark Rutland <mark.rutland@....com>
> > > > > Cc: Mark Brown <robh@...nel.org>
> > > > > Cc: Rob Herring <robh@...nel.org>
> > > > > Cc: Oliver Upton <oliver.upton@...ux.dev>
> > > > > Cc: Jonathan Corbet <corbet@....net>
> > > > > Cc: Eric Auger <eric.auger@...hat.com>
> > > > > Cc: kvmarm@...ts.linux.dev
> > > > > Cc: linux-doc@...r.kernel.org
> > > > > Cc: linux-kernel@...r.kernel.org
> > > > > Cc: linux-arm-kernel@...ts.infradead.org
> > > > >
> > > > > Anshuman Khandual (7):
> > > > >   arm64/sysreg: Update register fields for ID_AA64MMFR0_EL1
> > > > >   arm64/sysreg: Add register fields for HDFGRTR2_EL2
> > > > >   arm64/sysreg: Add register fields for HDFGWTR2_EL2
> > > > >   arm64/sysreg: Add register fields for HFGITR2_EL2
> > > > >   arm64/sysreg: Add register fields for HFGRTR2_EL2
> > > > >   arm64/sysreg: Add register fields for HFGWTR2_EL2
> > > > >   arm64/boot: Enable EL2 requirements for FEAT_PMUv3p9
> > > >
> > > > In case it is not clear, this series should be applied to 6.13 as the 2
> > > > PMUv3p9 features already landed in 6.13 (per counter EL0 control) and
> > > > 6.12 (ICNTR).
> > >
> > > So is this a fix that needs backporting to 6.12 or 6.13, e.g. fix for
> > > d8226d8cfbaf ("perf: arm_pmuv3: Add support for Armv9.4 PMU instruction
> > > counter")? It's pretty late in the cycle to take the series for 6.13.
> >
> > Ideally, yes. But given the state of h/w implementations, backporting
> > it later is probably fine if that is your preference.
> >
> > > But does KVM actually expose the feature to EL1 in ID_AA64DFR1_EL1 and
> > > than traps it at EL2?
> >
> > As Marc pointed out KVM only advertises PMUv3.8. Regardless, guest
> > accesses to these registers are trapped with or without this series.
>
> And most probably generates a nice splat in the kernel log, as nobody
> updated KVM to handle *correctly* PMICNTR_EL0 traps, let alone deal
> with the FGT2 registers.

Isn't that this series[1]? Should that have come first, I guess I know
that *now*.

Out of curiosity, why do we care if there's a splat or not for a not
well behaved guest?

Rob

[1] https://lore.kernel.org/all/20241210055311.780688-1-anshuman.khandual@arm.com/