linux-kernel - RE: [PATCH] tty: serial: fsl_lpuart: flush RX and TX FIFO when lpuart shutdown

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID:
 <DB9PR04MB842920F5FBB1E249ED8F78CA92122@DB9PR04MB8429.eurprd04.prod.outlook.com>
Date: Wed, 8 Jan 2025 03:03:05 +0000
From: Sherry Sun <sherry.sun@....com>
To: Frank Li <frank.li@....com>
CC: "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
	"jirislaby@...nel.org" <jirislaby@...nel.org>, "linux-serial@...r.kernel.org"
	<linux-serial@...r.kernel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "imx@...ts.linux.dev" <imx@...ts.linux.dev>
Subject: RE: [PATCH] tty: serial: fsl_lpuart: flush RX and TX FIFO when lpuart
 shutdown



> -----Original Message-----
> From: Frank Li <frank.li@....com>
> Sent: Tuesday, January 7, 2025 11:46 PM
> To: Sherry Sun <sherry.sun@....com>
> Cc: gregkh@...uxfoundation.org; jirislaby@...nel.org; linux-
> serial@...r.kernel.org; linux-kernel@...r.kernel.org; imx@...ts.linux.dev
> Subject: Re: [PATCH] tty: serial: fsl_lpuart: flush RX and TX FIFO when lpuart
> shutdown
> 
> On Tue, Jan 07, 2025 at 03:48:34PM +0800, Sherry Sun wrote:
> > Need to flush UART RX and TX FIFO when lpuart is shutting down to make
> > sure restore a clean data transfer environment.
> 
> why not flush it at open()?

Hi Frank,

Some background: We observed an issue during imx952 zebu simulation, imx952 edma IP has a bug that if an edma error occurs, it will directly return an error without marking the current request completed, so the current uart transfer will pending, the data will stuck in the FIFO even if we close the uart port and reopen it, which will impact the next data transfer.
Actually when we configure and enable the FIFO during uart startup, we also flush the RX/TX FIFO, but it is done after the rx/tx dma are started, so the dma request is still triggered by mistake.
And I think it is reasonable to flush the RX/TX FIFO when closing the uart port, so add this behavior in shutdown() to avoid changing the workflow of startup().

Best Regards
Sherry

> 
> >
> > Signed-off-by: Sherry Sun <sherry.sun@....com>
> > ---
> >  drivers/tty/serial/fsl_lpuart.c | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/tty/serial/fsl_lpuart.c
> > b/drivers/tty/serial/fsl_lpuart.c index 7cb1e36fdaab..c91b9d9818cd
> > 100644
> > --- a/drivers/tty/serial/fsl_lpuart.c
> > +++ b/drivers/tty/serial/fsl_lpuart.c
> > @@ -1965,6 +1965,11 @@ static void lpuart32_shutdown(struct uart_port
> *port)
> >  			UARTCTRL_TIE | UARTCTRL_TCIE | UARTCTRL_RIE |
> UARTCTRL_SBK);
> >  	lpuart32_write(port, temp, UARTCTRL);
> >
> > +	/* flush Rx/Tx FIFO */
> > +	temp = lpuart32_read(port, UARTFIFO);
> > +	temp |= UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH;
> > +	lpuart32_write(port, temp, UARTFIFO);
> > +
> >  	uart_port_unlock_irqrestore(port, flags);
> >
> >  	lpuart_dma_shutdown(sport);
> > --
> > 2.34.1
> >