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Message-ID: <d39a9325-87a4-4543-b6ec-1c61fca3a6fc@stanley.mountain>
Date: Wed, 8 Jan 2025 12:41:28 +0300
From: Dan Carpenter <dan.carpenter@...aro.org>
To: Jesse Zhang <jesse.zhang@....com>
Cc: Alex Deucher <alexander.deucher@....com>,
Christian König <christian.koenig@....com>,
Xinhui Pan <Xinhui.Pan@....com>, David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>,
Hawking Zhang <Hawking.Zhang@....com>,
Tim Huang <tim.huang@....com>,
"Jesse.zhang@....com" <Jesse.zhang@....com>,
Likun Gao <Likun.Gao@....com>,
Mario Limonciello <mario.limonciello@....com>,
Yang Wang <kevinyang.wang@....com>, Le Ma <le.ma@....com>,
amd-gfx@...ts.freedesktop.org, dri-devel@...ts.freedesktop.org,
linux-kernel@...r.kernel.org, kernel-janitors@...r.kernel.org
Subject: [PATCH] drm/amdgpu: Fix shift type in
amdgpu_debugfs_sdma_sched_mask_set()
The "mask" and "val" variables are type u64. The problem is that the
BIT() macros are type unsigned long which is just 32 bits on 32bit
systems.
It's unlikely that people will be using this driver on 32bit kernels
and even if they did we only use the lower AMDGPU_MAX_SDMA_INSTANCES (16)
bits. So this bug does not affect anything in real life.
Still, for correctness sake, u64 bit masks should use BIT_ULL().
Fixes: d2e3961ae371 ("drm/amdgpu: add amdgpu_sdma_sched_mask debugfs")
Signed-off-by: Dan Carpenter <dan.carpenter@...aro.org>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
index 632295bf3875..174badca27e7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
@@ -362,13 +362,13 @@ static int amdgpu_debugfs_sdma_sched_mask_set(void *data, u64 val)
if (!adev)
return -ENODEV;
- mask = (1 << adev->sdma.num_instances) - 1;
+ mask = BIT_ULL(adev->sdma.num_instances) - 1;
if ((val & mask) == 0)
return -EINVAL;
for (i = 0; i < adev->sdma.num_instances; ++i) {
ring = &adev->sdma.instance[i].ring;
- if (val & (1 << i))
+ if (val & BIT_ULL(i))
ring->sched.ready = true;
else
ring->sched.ready = false;
--
2.45.2
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