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Message-Id: <20250108112834.2880709-1-niravkumar.l.rabara@intel.com>
Date: Wed,  8 Jan 2025 19:28:34 +0800
From: niravkumar.l.rabara@...el.com
To: Dinh Nguyen <dinguyen@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	niravkumar.l.rabara@...el.com,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH] arm64: dts: socfpga: agilex5: add qspi flash node

From: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>

Add Micron qspi nor flash node for Intel SoCFPGA Agilex5.

Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
---
 .../boot/dts/intel/socfpga_agilex5_socdk.dts  | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
index c533e5a3a610..6760c088f174 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
@@ -37,3 +37,36 @@ &usb0 {
 &watchdog0 {
 	status = "okay";
 };
+
+&qspi {
+	status = "okay";
+	flash@0 {
+		compatible = "micron,mt25qu02g", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <100000000>;
+		m25p,fast-read;
+		cdns,page-size = <256>;
+		cdns,block-size = <16>;
+		cdns,read-delay = <2>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			qspi_boot: partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x04200000>;
+			};
+
+			root: partition@...0000 {
+				label = "root";
+				reg = <0x04200000 0x0be00000>;
+			};
+		};
+	};
+};
-- 
2.25.1


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