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Message-ID: <20250109211908.1553072-3-dario.binacchi@amarulasolutions.com>
Date: Thu, 9 Jan 2025 22:18:29 +0100
From: Dario Binacchi <dario.binacchi@...rulasolutions.com>
To: linux-kernel@...r.kernel.org
Cc: linux-amarula@...rulasolutions.com,
Dario Binacchi <dario.binacchi@...rulasolutions.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Conor Dooley <conor+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Rob Herring <robh@...nel.org>,
Stephen Boyd <sboyd@...nel.org>,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-clk@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com
Subject: [PATCH v2 2/4] dt-bindings: clock: st,stm32-rcc: support spread spectrum clocking
The addition of DT bindings for enabling and tuning spread spectrum
clocking generation is available only for the main PLL of stm32f{4,7}
platforms.
Signed-off-by: Dario Binacchi <dario.binacchi@...rulasolutions.com>
---
Changes in v2:
- Update the commit message
- Change st,ssc-modmethod type from non-unique-string-array to string
.../bindings/clock/st,stm32-rcc.yaml | 36 +++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml b/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml
index 779e547700be..628bbbcf2875 100644
--- a/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml
+++ b/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml
@@ -56,6 +56,26 @@ properties:
Phandle to system configuration controller. It can be used to control the
power domain circuitry.
+ st,ssc-modfreq-hz:
+ description:
+ The modulation frequency for main PLL (in Hz)
+
+ st,ssc-moddepth-permyriad:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ The modulation rate for main PLL (in permyriad, i.e. 0.01%)
+ minimum: 25
+ maximum: 200
+
+ st,ssc-modmethod:
+ $ref: /schemas/types.yaml#/definitions/string
+ description:
+ The modulation techniques for main PLL.
+ items:
+ enum:
+ - center-spread
+ - down-spread
+
required:
- compatible
- reg
@@ -81,6 +101,10 @@ allOf:
- description: high speed external (HSE) clock input
- description: low speed external (LSE) clock input
- description: Inter-IC sound (I2S) clock input
+ st,ssc-modfreq-hz: false
+ st,ssc-moddepth-permyriad: false
+ st,ssc-modmethod: false
+
else:
properties:
'#clock-cells':
@@ -98,6 +122,18 @@ additionalProperties: false
examples:
# Reset and Clock Control Module node:
+ - |
+ clock-controller@...23800 {
+ compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
+ reg = <0x40023800 0x400>;
+ #clock-cells = <2>;
+ #reset-cells = <1>;
+ clocks = <&clk_hse>, <&clk_i2s_ckin>;
+ st,syscfg = <&pwrcfg>;
+ st,ssc-modfreq-hz = <10000>;
+ st,ssc-moddepth-permyriad = <200>;
+ st,ssc-modmethod = "center-spread";
+ };
- |
clock-controller@...24400 {
compatible = "st,stm32h743-rcc", "st,stm32-rcc";
--
2.43.0
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