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Message-ID: <915c9c4e-75a7-4c4e-90a5-9a3de93bec1d@intel.com>
Date: Fri, 10 Jan 2025 07:14:08 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Nadav Amit <nadav.amit@...il.com>
Cc: Rik van Riel <riel@...riel.com>, the arch/x86 maintainers
 <x86@...nel.org>, Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
 kernel-team@...a.com, Dave Hansen <dave.hansen@...ux.intel.com>,
 luto@...nel.org, peterz@...radead.org, Thomas Gleixner <tglx@...utronix.de>,
 Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
 "H. Peter Anvin" <hpa@...or.com>, Andrew Morton <akpm@...ux-foundation.org>,
 zhengqi.arch@...edance.com, "open list:MEMORY MANAGEMENT"
 <linux-mm@...ck.org>
Subject: Re: [PATCH 06/12] x86/mm: use INVLPGB for kernel TLB flushes

On 1/9/25 22:07, Nadav Amit wrote:
> This is not my reading. I think that this reading assumes that besides
> the broadcast, some new “range flush” was added to the TLB. My guess
> is that this not the case, since presumably it would require a different
> TLB structure (and who does 2 changes at once 😉 ).

Reading it again, I think you're right.

The INVLPG and INVLPGB language is too close. It would also _talk_ about
invalidating a range rather than just incrementing an address to invalidate.

I think the key thing we need to decide is whether to treat a single
INVLPGB(stride=8) more like a single INVLPGB or eight INVLPGBs.
Measuring a bunch of invalidation looks should tell us that.


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