lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-Id: <173652403824.316821.7989247622292618802.b4-ty@kernel.org>
Date: Fri, 10 Jan 2025 15:47:18 +0000
From: Mark Brown <broonie@...nel.org>
To: Sanjay R Mehta <sanju.mehta@....com>, Han Xu <han.xu@....com>, 
 Conor Dooley <conor.dooley@...rochip.com>, 
 Daire McNamara <daire.mcnamara@...rochip.com>, 
 Matthias Brugger <matthias.bgg@...il.com>, 
 AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, 
 Haibo Chen <haibo.chen@....com>, Yogesh Gaur <yogeshgaur.83@...il.com>, 
 Heiko Stuebner <heiko@...ech.de>, Michal Simek <michal.simek@....com>, 
 Richard Weinberger <richard@....at>, Vignesh Raghavendra <vigneshr@...com>, 
 Jacky Huang <ychuang3@...oton.com>, Shan-Chun Hung <schung@...oton.com>, 
 Chin-Ting Kuo <chin-ting_kuo@...eedtech.com>, 
 Cédric Le Goater <clg@...d.org>, 
 Joel Stanley <joel@....id.au>, Andrew Jeffery <andrew@...econstruct.com.au>, 
 Avi Fishman <avifishman70@...il.com>, Tomer Maimon <tmaimon77@...il.com>, 
 Tali Perry <tali.perry1@...il.com>, Patrick Venture <venture@...gle.com>, 
 Nancy Yuen <yuenn@...gle.com>, Benjamin Fair <benjaminfair@...gle.com>, 
 Maxime Coquelin <mcoquelin.stm32@...il.com>, 
 Alexandre Torgue <alexandre.torgue@...s.st.com>, 
 Raju Rangoju <Raju.Rangoju@....com>, 
 Miquel Raynal <miquel.raynal@...tlin.com>
Cc: Thomas Petazzoni <thomas.petazzoni@...tlin.com>, 
 Steam Lin <stlin2@...bond.com>, linux-spi@...r.kernel.org, 
 linux-kernel@...r.kernel.org, imx@...ts.linux.dev, 
 linux-riscv@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org, 
 linux-mediatek@...ts.infradead.org, linux-rockchip@...ts.infradead.org, 
 linux-mtd@...ts.infradead.org, linux-aspeed@...ts.ozlabs.org, 
 openbmc@...ts.ozlabs.org, linux-stm32@...md-mailman.stormreply.com, 
 Pratyush Yadav <pratyush@...nel.org>, 
 Tudor Ambarus <tudor.ambarus@...aro.org>, stable+noautosel@...nel.org
Subject: Re: (subset) [PATCH v2 00/27] spi-nand/spi-mem DTR support

On Tue, 24 Dec 2024 18:05:45 +0100, Miquel Raynal wrote:
> Here is a (big) series supposed to bring DTR support in SPI-NAND.
> 
> I could have split this into two but I eventually preferred showing the
> big picture. Once v1 will be over, I can make it two. However when we'll
> discuss merging, we'll have to share an immutable tag among the two
> subsystems.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[01/27] spi: spi-mem: Extend spi-mem operations with a per-operation maximum frequency
        commit: 0fefeade90e74bc8f40ab0e460f483565c492e28
[02/27] spi: spi-mem: Add a new controller capability
        commit: 1248c9b8d54120950fda10fbeb98fb8932b4d45c
[03/27] spi: amd: Support per spi-mem operation frequency switches
        commit: d0e5faccb229b1dacc4c9fa11f6df33bb1fdabd8
[04/27] spi: amd: Drop redundant check
        commit: e6204f39fe3a7b4538815a2d778b601bd543649e
[05/27] spi: amlogic-spifc-a1: Support per spi-mem operation frequency switches
        commit: 5baa189789e8894c58eacc7803e3c163c1d0fc0a
[06/27] spi: cadence-qspi: Support per spi-mem operation frequency switches
        commit: 06e9f5a1f6ba774d8942a168d3ec5ed5a008fbcb
[07/27] spi: dw: Support per spi-mem operation frequency switches
        commit: eee7bc9e7ade6f7ac17d9ec02887cd5509ba9427
[08/27] spi: fsl-qspi: Support per spi-mem operation frequency switches
        commit: 2438db5253eb17a7c0ccb15aea4252a150dda057
[09/27] spi: microchip-core-qspi: Support per spi-mem operation frequency switches
        commit: 13529647743d906ed3cf991f1d77727e7ff1fb6f
[10/27] spi: mt65xx: Support per spi-mem operation frequency switches
        commit: 13fd04b53053bbfa741a0f2a781837ab80e485f6
[11/27] spi: mxic: Support per spi-mem operation frequency switches
        commit: 67707cb094f134f5b3931eefbedbb9ca7e3209d0
[12/27] spi: nxp-fspi: Support per spi-mem operation frequency switches
        commit: 26851cf65ffca2d3a8d529a125e54cf0084d69e7
[13/27] spi: rockchip-sfc: Support per spi-mem operation frequency switches
        commit: d3f35dd3ad968256ed1080e3ea2022f947861cff
[14/27] spi: spi-sn-f-ospi: Support per spi-mem operation frequency switches
        commit: 1a206344218cc15ad8f321e3abab3f3d36ab639f
[15/27] spi: spi-ti-qspi: Support per spi-mem operation frequency switches
        commit: b2fac3192919dd07e7ce30558e34abd7e07dde77
[16/27] spi: zynq-qspi: Support per spi-mem operation frequency switches
        commit: 9a68f6c8d6cfddeac7c5874528ed04e50a1cb579
[17/27] spi: zynqmp-gqspi: Support per spi-mem operation frequency switches
        commit: 30eb2e6e78225f92f04a2325c6fd77fe8f5b4aab
[18/27] spi: spi-mem: Reorder spi-mem macro assignments
        commit: d1f85873d2d62d6980e68d21d3a21f20b0664cc3
[19/27] spi: spi-mem: Create macros for DTR operation
        commit: f0006897a96c736623ddeb9b68c3880eb5cdebe7
[20/27] spi: spi-mem: Estimate the time taken by operations
        (no commit info)

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ