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Message-ID: <20250110171112.GF4213@noisy.programming.kicks-ass.net>
Date: Fri, 10 Jan 2025 18:11:12 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Mathieu Desnoyers <mathieu.desnoyers@...icios.com>
Cc: libc-alpha <libc-alpha@...rceware.org>,
Florian Weimer <fweimer@...hat.com>,
"carlos@...hat.com" <carlos@...hat.com>,
Mark Rutland <mark.rutland@....com>,
linux-kernel <linux-kernel@...r.kernel.org>, x86@...nel.org,
paulmck <paulmck@...nel.org>,
Michael Jeanson <mjeanson@...icios.com>
Subject: Re: Prevent inconsistent CPU state after sequence of dlclose/dlopen
On Fri, Jan 10, 2025 at 12:02:27PM -0500, Mathieu Desnoyers wrote:
> On 2025-01-10 11:54, Peter Zijlstra wrote:
> > On Fri, Jan 10, 2025 at 10:55:36AM -0500, Mathieu Desnoyers wrote:
> > > Hi,
> > >
> > > I was discussing with Mark Rutland recently, and he pointed out that a
> > > sequence of dlclose/dlopen mapping new code at the same addresses in
> > > multithreaded environments is an issue on ARM, and possibly on Intel/AMD
> > > with the newer TLB broadcast maintenance.
> >
> > What is the exact race? Should not munmap() invalidate the TLBs before
> > it allows overlapping mmap() to complete?
>
> The race Mark mentioned (on ARM) is AFAIU the following scenario:
>
> CPU 0 CPU 1
>
> - dlopen()
> - mmap PROT_EXEC @addr
> - fetch insn @addr, CPU state expects unchanged insn.
> - execute unrelated code
> - dlclose(addr)
> - munmap @addr
> - dlopen()
> - mmap PROT_EXEC @addr
> - fetch new insn @addr. Incoherent CPU state.
Urgh.. Mark, is this because of non-coherent i-cache or somesuch misery?
But shouldn't flush_{,i}cache_range() or something along those lines not
handle this?
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