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Message-ID: <CAH2o1u7UiNpAKfyJJ6t+yaQY_VpCOeXjki4BQLwsQuEEyG=c9A@mail.gmail.com>
Date: Fri, 10 Jan 2025 12:48:12 -0800
From: Tomasz Jeznach <tjeznach@...osinc.com>
To: Guo Ren <guoren@...nel.org>
Cc: Samuel Holland <samuel.holland@...ive.com>, Alexandre Ghiti <alex@...ti.fr>, joro@...tes.org, 
	will@...nel.org, robin.murphy@....com, paul.walmsley@...ive.com, 
	palmer@...belt.com, baolu.lu@...ux.intel.com, zong.li@...ive.com, 
	iommu@...ts.linux.dev, linux-riscv@...ts.infradead.org, 
	linux-kernel@...r.kernel.org, Guo Ren <guoren@...ux.alibaba.com>
Subject: Re: [PATCH] iommu/riscv: Fixup compile warning

On Tue, Jan 7, 2025 at 10:48 PM Guo Ren <guoren@...nel.org> wrote:
>
> Hi Samuel & Alexandre,
>
> On Tue, Jan 7, 2025 at 1:47 AM Samuel Holland <samuel.holland@...ive.com> wrote:
> >
> > Hi Alex,
> >
> > On 2025-01-06 4:31 AM, Alexandre Ghiti wrote:
> > > On 03/01/2025 03:46, guoren@...nel.org wrote:
> > >> From: Guo Ren <guoren@...ux.alibaba.com>
> > >>
> > >> When __BITS_PER_LONG == 32, size_t is defined as unsigned int rather
> > >
> > >
> > > RISCV_IOMMU depends on 64BIT so how do you get __BITS_PER_LONG == 32?
> >
> > I am guessing this is from some downstream effort to compile a 64-bit kernel
> > with an ILP32 ABI. However unsupported that may be, size_t is the nominal type
> > used in both riscv_iommu_pte_fetch() and above in iommu_iotlb_gather_add_page(),
> > so the change does make sense.
> Yes, I'm working on ILP32 ABI on CONFIG_64BIT=y. So, I got the warning
> when __BITS_PER_LONG == 32.
>
> In riscv_iommu_unmap_pages(), we've written "size_t pte_size;." So, we
> should do that in "riscv_iommu_iova_to_phys()".
>

Thanks for pointing this out.
Do we have to change other relevant uses of `unsigned long` to either
`phys_addr_t` or `dma_addr_t` to avoid type mismatch and get ILP32
working correctly?

Anyway, for quick warning fix:
Reviewed-by: Tomasz Jeznach <tjeznach@...osinc.com>

> >
> > Regards,
> > Samuel
> >
> > >> than unsigned long. Therefore, we should use size_t to avoid
> > >> type-checking errors.
> > >>
> > >> Fixes: 488ffbf18171 ("iommu/riscv: Paging domain support")
> > >> Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
> > >> Signed-off-by: Guo Ren <guoren@...nel.org>
> > >> Cc: Tomasz Jeznach <tjeznach@...osinc.com>
> > >> ---
> > >>   drivers/iommu/riscv/iommu.c | 2 +-
> > >>   1 file changed, 1 insertion(+), 1 deletion(-)
> > >>
> > >> diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
> > >> index 8a05def774bd..38d381164385 100644
> > >> --- a/drivers/iommu/riscv/iommu.c
> > >> +++ b/drivers/iommu/riscv/iommu.c
> > >> @@ -1270,7 +1270,7 @@ static phys_addr_t riscv_iommu_iova_to_phys(struct
> > >> iommu_domain *iommu_domain,
> > >>                           dma_addr_t iova)
> > >>   {
> > >>       struct riscv_iommu_domain *domain = iommu_domain_to_riscv(iommu_domain);
> > >> -    unsigned long pte_size;
> > >> +    size_t pte_size;
> > >>       unsigned long *ptr;
> > >>         ptr = riscv_iommu_pte_fetch(domain, iova, &pte_size);
> >
>
>
> --
> Best Regards
>  Guo Ren

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