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Message-ID: <Z4Vi9raM/lOot/SQ@Asurada-Nvidia>
Date: Mon, 13 Jan 2025 11:01:10 -0800
From: Nicolin Chen <nicolinc@...dia.com>
To: <will@...nel.org>
CC: <jgg@...dia.com>, <kevin.tian@...el.com>, <corbet@....net>,
<oe-kbuild-all@...ts.linux.dev>, <joro@...tes.org>,
<suravee.suthikulpanit@....com>, <robin.murphy@....com>,
<dwmw2@...radead.org>, <baolu.lu@...ux.intel.com>, <shuah@...nel.org>,
<linux-kernel@...r.kernel.org>, <iommu@...ts.linux.dev>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kselftest@...r.kernel.org>,
<linux-doc@...r.kernel.org>, <eric.auger@...hat.com>,
<jean-philippe@...aro.org>, <mdf@...nel.org>, <mshavit@...gle.com>,
<shameerali.kolothum.thodi@...wei.com>, <smostafa@...gle.com>,
<ddutile@...hat.com>, <yi.l.liu@...el.com>, <patches@...ts.linux.dev>
Subject: Re: [PATCH v5 14/14] iommu/arm-smmu-v3: Report events that belong to
devices attached to vIOMMU
On Thu, Jan 09, 2025 at 07:04:10PM +0800, kernel test robot wrote:
> sparse warnings: (new ones prefixed by >>)
> >> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c:461:21: sparse: sparse: invalid assignment: &=
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c:461:21: sparse: left side has type restricted __le64
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c:461:21: sparse: right side has type unsigned long long
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c:462:21: sparse: sparse: invalid assignment: |=
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c:462:21: sparse: left side has type restricted __le64
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c:462:21: sparse: right side has type unsigned long long
> >> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c:464:23: sparse: sparse: cast from restricted __le64
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c:465:23: sparse: sparse: cast from restricted __le64
I fixed these with the followings:
-----------------------------------------------------------------------------------
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
index 0c7a5894ba07..aa453e842a39 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
@@ -457,20 +457,28 @@ struct iommufd_viommu *arm_vsmmu_alloc(struct device *dev,
return &vsmmu->core;
}
+/* This is basically iommu_vevent_arm_smmuv3 in u64 for conversion */
+struct arm_vsmmu_evt {
+ union {
+ u64 evt[EVTQ_ENT_DWORDS];
+ struct iommu_vevent_arm_smmuv3 uevt;
+ };
+};
+
int arm_vmaster_report_event(struct arm_smmu_vmaster *vmaster, u64 *evt)
{
- struct iommu_vevent_arm_smmuv3 vevt =
- *(struct iommu_vevent_arm_smmuv3 *)evt;
+ struct arm_vsmmu_evt *vevt = (struct arm_vsmmu_evt *)evt;
+ int i;
- vevt.evt[0] &= ~EVTQ_0_SID;
- vevt.evt[0] |= FIELD_PREP(EVTQ_0_SID, vmaster->vsid);
+ vevt->evt[0] &= ~EVTQ_0_SID;
+ vevt->evt[0] |= FIELD_PREP(EVTQ_0_SID, vmaster->vsid);
- vevt.evt[0] = cpu_to_le64(vevt.evt[0]);
- vevt.evt[1] = cpu_to_le64(vevt.evt[1]);
+ for (i = 0; i < EVTQ_ENT_DWORDS; i++)
+ vevt->uevt.evt[i] = cpu_to_le64(vevt->evt[i]);
return iommufd_viommu_report_event(&vmaster->vsmmu->core,
- IOMMU_VEVENTQ_TYPE_ARM_SMMUV3, &vevt,
- sizeof(vevt));
+ IOMMU_VEVENTQ_TYPE_ARM_SMMUV3,
+ &vevt->uevt, sizeof(vevt->uevt));
}
MODULE_IMPORT_NS("IOMMUFD");
-----------------------------------------------------------------------------------
This also fixes the array size from 2 to EVTQ_ENT_DWORDS==(4).
@Will,
Would it be possible for you to ack or review the two SMMU patches
in this series? I am still hoping Jason might be able to take this
after I respin a v6.
Thanks!
Nicolin
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