linux-kernel - Re: [PATCH v2 3/3] riscv: dts: canaan: Add clock initial support for K230

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Message-ID: <a1386cfb-7698-43f6-acff-628d9626da47@zohomail.com>
Date: Mon, 13 Jan 2025 20:19:19 +0800
From: Xukai Wang <kingxukai@...omail.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Michael Turquette <mturquette@...libre.com>,
 Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Paul Walmsley <paul.walmsley@...ive.com>,
 Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
 linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
 Troy Mitchell <TroyMitchell988@...il.com>
Subject: Re: [PATCH v2 3/3] riscv: dts: canaan: Add clock initial support for
 K230


On 2025/1/9 17:09, Krzysztof Kozlowski wrote:
> On Wed, Jan 08, 2025 at 07:53:09PM +0800, Xukai Wang wrote:
>> This patch provides basic support for the K230 clock, which does not
>> cover all clocks.
>>
>> The clock tree of the K230 SoC consists of OSC24M,
>> PLLs and sysclk.
>>
>> Co-developed-by: Troy Mitchell <TroyMitchell988@...il.com>
>> Signed-off-by: Troy Mitchell <TroyMitchell988@...il.com>
>> Signed-off-by: Xukai Wang <kingxukai@...omail.com>
>> ---
>>  arch/riscv/boot/dts/canaan/k230.dtsi | 27 +++++++++++++++++++++++++++
>>  1 file changed, 27 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/canaan/k230.dtsi b/arch/riscv/boot/dts/canaan/k230.dtsi
>> index 95c1a3d8fb1192e30113d96d3e96329545bc6ae7..c407471af3daac154e0fbdd377d57ea3ff4698e1 100644
>> --- a/arch/riscv/boot/dts/canaan/k230.dtsi
>> +++ b/arch/riscv/boot/dts/canaan/k230.dtsi
>> @@ -3,6 +3,7 @@
>>   * Copyright (C) 2024 Yangyu Chen <cyy@...self.name>
>>   */
>>  
>> +#include <dt-bindings/clock/k230-clk.h>
>>  #include <dt-bindings/interrupt-controller/irq.h>
>>  
>>  /dts-v1/;
>> @@ -65,6 +66,13 @@ apb_clk: apb-clk-clock {
>>  		#clock-cells = <0>;
>>  	};
>>  
>> +	osc24m: clock-24m {
>> +		compatible = "fixed-clock";
>> +		#clock-cells = <0>;
>> +		clock-frequency = <24000000>;
>> +		clock-output-names = "osc24m";
>> +	};
>> +
>>  	soc {
>>  		compatible = "simple-bus";
>>  		interrupt-parent = <&plic>;
>> @@ -138,5 +146,24 @@ uart4: serial@...04000 {
>>  			reg-shift = <2>;
>>  			status = "disabled";
>>  		};
>> +
>> +		sysclk: clock-controller@...00000 {
> Does not look like placed in correct order.
>
>> +			compatible = "canaan,k230-clk";
>> +			reg = <0x0 0x91102000 0x0 0x1000>, <0x0 0x91100000 0x0 0x1000>;
>> +			clocks = <&osc24m>;
>> +			#clock-cells = <1>;
>> +			clock-output-names =
> Unnecessary blank line
>
>> +			"CPU0_ACLK", "CPU0_PLIC", "CPU0_NOC_DDRCP4", "CPU0_PCLK",
> Messed indentation/alignment. See DTS coding style.

I've reorder the properties and changed the indentation:

osc24m: clock-24m {
        compatible = "fixed-clock";
        clock-frequency = <24000000>;
        clock-output-names = "osc24m";
        #clock-cells = <0>;
};

sysclk: clock-controller@...02000 {

        compatible = "canaan,k230-clk";
        reg = <0x0 0x91102000 0x0 0x1000>,
              <0x0 0x91100000 0x0 0x1000>;
        clocks = <&osc24m>;
        clock-output-names = "CPU0_ACLK", "CPU0_PLIC", "CPU0_NOC_DDRCP4",
                             "CPU0_PCLK", "PMU_PCLK", "HS_HCLK_HIGH_SRC",
                             "HS_HCLK_HIGH_GATE", "HS_HCLK_SRC",
                             "HS_SD0_HS_AHB_GAT", "HS_SD1_HS_AHB_GAT",
                             "HS_SSI1_HS_AHB_GA", "HS_SSI2_HS_AHB_GA",
                             "HS_USB0_HS_AHB_GA", "HS_USB1_HS_AHB_GA",
                             "HS_SSI0_AXI", "HS_SSI1", "HS_SSI2",
                             "HS_QSPI_AXI_SRC", "HS_SSI1_ACLK_GATE",
                             "HS_SSI2_ACLK_GATE", "HS_SD_CARD_SRC",
                             "HS_SD0_CARD_TX", "HS_SD1_CARD_TX",
                             "HS_SD_AXI_SRC", "HS_SD0_AXI_GATE",
                             "HS_SD1_AXI_GATE", "HS_SD0_BASE_GATE",
                             "HS_SD1_BASE_GATE", "HS_OSPI_SRC",
                             "HS_USB_REF_51M", "HS_SD_TIMER_SRC",
                             "HS_SD0_TIMER_GATE", "HS_SD1_TIMER_GATE",
                             "HS_USB0_REFERENCE", "HS_USB1_REFERENCE";
        #clock-cells = <1>;
};

Does this updated version looks appropriate？

>
> Best regards,
> Krzysztof
>