linux-kernel - Re: [PATCH v5 03/16] CXL/PCI: Introduce PCIe helper functions pcie_is_cxl() and pcie_is_cxl

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Message-ID: <6786f4531d23_195f0e2946a@iweiny-mobl.notmuch>
Date: Tue, 14 Jan 2025 17:33:39 -0600
From: Ira Weiny <ira.weiny@...el.com>
To: "Bowman, Terry" <terry.bowman@....com>, Ira Weiny <ira.weiny@...el.com>,
	<linux-cxl@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-pci@...r.kernel.org>, <nifan.cxl@...il.com>, <dave@...olabs.net>,
	<jonathan.cameron@...wei.com>, <dave.jiang@...el.com>,
	<alison.schofield@...el.com>, <vishal.l.verma@...el.com>,
	<dan.j.williams@...el.com>, <bhelgaas@...gle.com>, <mahesh@...ux.ibm.com>,
	<oohall@...il.com>, <Benjamin.Cheatham@....com>, <rrichter@....com>,
	<nathan.fontenot@....com>, <Smita.KoralahalliChannabasappa@....com>,
	<lukas@...ner.de>, <ming.li@...omail.com>,
	<PradeepVineshReddy.Kodamati@....com>, <alucerop@....com>
Subject: Re: [PATCH v5 03/16] CXL/PCI: Introduce PCIe helper functions
 pcie_is_cxl() and pcie_is_cxl_port()

Bowman, Terry wrote:
> 
> 
> 
> On 1/13/2025 5:49 PM, Ira Weiny wrote:
> > Terry Bowman wrote:
> >> CXL and AER drivers need the ability to identify CXL devices and CXL port
> >> devices.
> >>
> >> First, add set_pcie_cxl() with logic checking for CXL Flexbus DVSEC
> >> presence. The CXL Flexbus DVSEC presence is used because it is required
> >> for all the CXL PCIe devices.[1]
> >>
> >> Add boolean 'struct pci_dev::is_cxl' with the purpose to cache the CXL
> >> Flexbus presence.
> >>
> >> Add pcie_is_cxl() as a macro to return 'struct pci_dev::is_cxl'.
> >>
> >> Add pcie_is_cxl_port() to check if a device is a CXL Root Port, CXL
> >> Upstream Switch Port, or CXL Downstream Switch Port. Also, verify the
> >> CXL Extensions DVSEC for Ports is present.[1]
> >>
> >> [1] CXL 3.1 Spec, 8.1.1 PCIe Designated Vendor-Specific Extended
> >>     Capability (DVSEC) ID Assignment, Table 8-2
> >>
> >> Signed-off-by: Terry Bowman <terry.bowman@....com>
> >> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
> >> Reviewed-by: Dave Jiang <dave.jiang@...el.com>
> >> Reviewed-by: Fan Ni <fan.ni@...sung.com>
> >> ---
> >>  drivers/pci/pci.c             | 13 +++++++++++++
> >>  drivers/pci/probe.c           | 10 ++++++++++
> >>  include/linux/pci.h           |  4 ++++
> >>  include/uapi/linux/pci_regs.h |  3 ++-
> >>  4 files changed, 29 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> >> index 661f98c6c63a..9319c62e3488 100644
> >> --- a/drivers/pci/pci.c
> >> +++ b/drivers/pci/pci.c
> >> @@ -5036,10 +5036,23 @@ static int pci_dev_reset_slot_function(struct pci_dev *dev, bool probe)
> >>  
> >>  static u16 cxl_port_dvsec(struct pci_dev *dev)
> >>  {
> >> +	if (!pcie_is_cxl(dev))
> >> +		return 0;
> >> +
> >>  	return pci_find_dvsec_capability(dev, PCI_VENDOR_ID_CXL,
> >>  					 PCI_DVSEC_CXL_PORT);
> >>  }
> >>  
> >> +bool pcie_is_cxl_port(struct pci_dev *dev)
> >> +{
> >> +	if ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
> >> +	    (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
> >> +	    (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM))
> >> +		return false;
> >> +
> >> +	return cxl_port_dvsec(dev);
> > Returning bool from a function which returns u16 is odd and I don't think
> > it should be coded this way.  I don't think it is wrong right now but this
> > really ought to code the pcie_is_cxl() here and leave cxl_port_dvsec()
> > alone.  Calling cxl_port_dvsec(), checking for if the dvsec exists, and
> > returning bool.
> 
> Hi Ira,
> 
> Thanks for reviewing. Is this what you are looking for here:
> 
> +bool pcie_is_cxl_port(struct pci_dev *dev)
> +{
> +	return (cxl_port_dvsec(dev) > 0);

With the type checks, yes that is more clear.

Ira

[snip]