linux-kernel - Re: [RFC] x86/alternatives: Merge first and second step in text_poke_bp

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Message-ID: <Z4Z1MoJV0WW-vIHp@krava>
Date: Tue, 14 Jan 2025 15:31:14 +0100
From: Jiri Olsa <olsajiri@...il.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Steven Rostedt <rostedt@...dmis.org>,
	Masami Hiramatsu <mhiramat@...nel.org>,
	David Laight <David.Laight@...lab.com>,
	lkml <linux-kernel@...r.kernel.org>,
	linux-trace-kernel@...r.kernel.org, bpf@...r.kernel.org,
	x86@...nel.org
Subject: Re: [RFC] x86/alternatives: Merge first and second step in
 text_poke_bp_batch

On Tue, Jan 14, 2025 at 03:17:23PM +0100, Peter Zijlstra wrote:
> On Tue, Jan 14, 2025 at 03:02:37PM +0100, Jiri Olsa wrote:
> > hi,
> > while checking on similar code for uprobes I was wondering if we
> > can merge first 2 steps of instruction update in text_poke_bp_batch
> > function.
> > 
> > Basically the first step now would be to write int3 byte together
> > with the rest of the bytes of the new instruction instead of doing
> > that separately. And the second step would be to overwrite int3
> > byte with first byte of the new instruction.
> > 
> > Would that work or do I miss some x86 detail that could lead to crash?
> 
> I *think* it will work on most modern systems, but I'm very sure I don't
> have all the details.
> 
> IIRC this is the magic recipe blessed by both Intel and AMD, and
> if we're going to be changing this I would want both vendors to sign off
> on that.

ok

> 
> > I tried to hack it together in attached patch and it speeds up a bit
> > text_poke_bp_batch as shown below.
> 
> Why do we care about performance here?

just a benefit of doing that change.. but mainly I was just curious
on why those first steps are separated

thanks,
jirka