linux-kernel - [PATCH v5 0/3] Enable Zicbom in usermode

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Message-Id: <20250115024024.84365-1-cuiyunhui@bytedance.com>
Date: Wed, 15 Jan 2025 10:40:21 +0800
From: Yunhui Cui <cuiyunhui@...edance.com>
To: ajones@...tanamicro.com,
	alexghiti@...osinc.com,
	andybnac@...il.com,
	aou@...s.berkeley.edu,
	charlie@...osinc.com,
	cleger@...osinc.com,
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	cuiyunhui@...edance.com,
	evan@...osinc.com,
	jesse@...osinc.com,
	linux-doc@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-kselftest@...r.kernel.org,
	linux-riscv@...ts.infradead.org,
	palmer@...belt.com,
	paul.walmsley@...ive.com,
	samuel.holland@...ive.com,
	shuah@...nel.org
Subject: [PATCH v5 0/3] Enable Zicbom in usermode

v1/v2:
There is only the first patch: RISC-V: Enable cbo.clean/flush in usermode,
which mainly removes the enabling of cbo.inval in user mode.

v3:
Add the functionality of Expose Zicbom and selftests for Zicbom.

v4:
Modify the order of macros, The test_no_cbo_inval function is added
separately.

v5:
1. Modify the order of RISCV_HWPROBE_KEY_ZICBOM_BLOCK_SIZE in hwprobe.rst
2. "TEST_NO_ZICBOINVAL" -> "TEST_NO_CBO_INVAL"

Yunhui Cui (3):
  RISC-V: Enable cbo.clean/flush in usermode
  RISC-V: hwprobe: Expose Zicbom extension and its block size
  RISC-V: selftests: Add TEST_ZICBOM into CBO tests

 Documentation/arch/riscv/hwprobe.rst        |  6 ++
 arch/riscv/include/asm/hwprobe.h            |  2 +-
 arch/riscv/include/uapi/asm/hwprobe.h       |  2 +
 arch/riscv/kernel/cpufeature.c              |  8 +++
 arch/riscv/kernel/sys_hwprobe.c             |  6 ++
 tools/testing/selftests/riscv/hwprobe/cbo.c | 66 +++++++++++++++++----
 6 files changed, 78 insertions(+), 12 deletions(-)

-- 
2.39.2