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Message-ID: <173696311816.425091.11020787403325383310.b4-ty@bootlin.com>
Date: Wed, 15 Jan 2025 18:45:50 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Tudor Ambarus <tudor.ambarus@...aro.org>,
Michael Walle <mwalle@...nel.org>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Cheng Ming Lin <linchengming884@...il.com>,
Alexander Stein <alexander.stein@...tq-group.com>,
Pratyush Yadav <pratyush@...nel.org>
Cc: Miquel Raynal <miquel.raynal@...tlin.com>,
linux-kernel@...r.kernel.org,
linux-mtd@...ts.infradead.org,
alvinzhou@...c.com.tw,
leoyu@...c.com.tw,
Cheng Ming Lin <chengminglin@...c.com.tw>
Subject: Re: [PATCH v2] Revert "mtd: spi-nor: core: replace dummy buswidth from addr to data"
On Wed, 15 Jan 2025 13:41:56 +0000, Pratyush Yadav wrote:
> This reverts commit 98d1fb94ce75f39febd456d6d3cbbe58b6678795.
>
> The commit uses data nbits instead of addr nbits for dummy phase. This
> causes a regression for all boards where spi-tx-bus-width is smaller
> than spi-rx-bus-width. It is a common pattern for boards to have
> spi-tx-bus-width == 1 and spi-rx-bus-width > 1. The regression causes
> all reads with a dummy phase to become unavailable for such boards,
> leading to a usually slower 0-dummy-cycle read being selected.
>
> [...]
Applied to mtd/fixes, thanks!
[1/1] Revert "mtd: spi-nor: core: replace dummy buswidth from addr to data"
commit: d15638bf76ad47874ecb5dc386f0945fc0b2a875
Patche(s) will be available within hours on:
mtd/linux.git
Kind regards,
Miquèl
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