linux-kernel - [PATCH 1/2] x86/cpufeatures: Add CPU feature flags for Zhaoxin Hash Engine v2

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Message-ID: <20250114121301.156359-2-TonyWWang-oc@zhaoxin.com>
Date: Tue, 14 Jan 2025 20:13:00 +0800
From: Tony W Wang-oc <TonyWWang-oc@...oxin.com>
To: <tglx@...utronix.de>, <mingo@...hat.com>, <bp@...en8.de>,
        <dave.hansen@...ux.intel.com>, <x86@...nel.org>, <hpa@...or.com>,
        <pawan.kumar.gupta@...ux.intel.com>, <jpoimboe@...nel.org>,
        <daniel.sneddon@...ux.intel.com>, <perry.yuan@....com>,
        <thomas.lendacky@....com>, <sandipan.das@....com>,
        <namhyung@...nel.org>, <acme@...hat.com>, <xin3.li@...el.com>,
        <brijesh.singh@....com>, <TonyWWang-oc@...oxin.com>,
        <linux-kernel@...r.kernel.org>, <herbert@...dor.apana.org.au>,
        <davem@...emloft.net>, <linux-crypto@...r.kernel.org>
CC: <CobeChen@...oxin.com>, <TimGuo@...oxin.com>, <LeoLiu-oc@...oxin.com>,
        <GeorgeXue@...oxin.com>
Subject: [PATCH 1/2] x86/cpufeatures: Add CPU feature flags for Zhaoxin Hash Engine v2

Zhaoxin currently uses CPUID leaf 0xC0000001 instead of VIA/Cyrix/
Centaur to represent the presence or absence of certain CPU features
due to company changes. The previously occupied bits in CPUID leaf
0xC0000001 remain functional, and the unoccupied bits are used by
Zhaoxin to represent some new CPU features.

Zhaoxin CPUs implements the PadLock Hash Engine v2 feature on the
basis of features supported by CPUID leaf 0xC0000001, which indicates
that Zhaoxin CPUs support SHA384/SHA512 algorithm hardware instructions.

Add two Padlock Hash Engine v2 feature flags support in cpufeatures.h

Signed-off-by: Tony W Wang-oc <TonyWWang-oc@...oxin.com>
---
 arch/x86/include/asm/cpufeatures.h       | 4 +++-
 tools/arch/x86/include/asm/cpufeatures.h | 4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 508c0dad116b..92d2a83499d0 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -143,7 +143,7 @@
 #define X86_FEATURE_RDRAND		( 4*32+30) /* "rdrand" RDRAND instruction */
 #define X86_FEATURE_HYPERVISOR		( 4*32+31) /* "hypervisor" Running on a hypervisor */
 
-/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
+/* Zhaoxin/VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
 #define X86_FEATURE_XSTORE		( 5*32+ 2) /* "rng" RNG present (xstore) */
 #define X86_FEATURE_XSTORE_EN		( 5*32+ 3) /* "rng_en" RNG enabled */
 #define X86_FEATURE_XCRYPT		( 5*32+ 6) /* "ace" on-CPU crypto (xcrypt) */
@@ -154,6 +154,8 @@
 #define X86_FEATURE_PHE_EN		( 5*32+11) /* "phe_en" PHE enabled */
 #define X86_FEATURE_PMM			( 5*32+12) /* "pmm" PadLock Montgomery Multiplier */
 #define X86_FEATURE_PMM_EN		( 5*32+13) /* "pmm_en" PMM enabled */
+#define X86_FEATURE_PHE2		( 5*32+25) /* "phe2" Zhaoxin PadLock Hash Engine v2 */
+#define X86_FEATURE_PHE2_EN		( 5*32+26) /* "phe2_en" PHE2 enabled */
 
 /* More extended AMD flags: CPUID level 0x80000001, ECX, word 6 */
 #define X86_FEATURE_LAHF_LM		( 6*32+ 0) /* "lahf_lm" LAHF/SAHF in long mode */
diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h
index 17b6590748c0..2206fe3ce49e 100644
--- a/tools/arch/x86/include/asm/cpufeatures.h
+++ b/tools/arch/x86/include/asm/cpufeatures.h
@@ -143,7 +143,7 @@
 #define X86_FEATURE_RDRAND		( 4*32+30) /* "rdrand" RDRAND instruction */
 #define X86_FEATURE_HYPERVISOR		( 4*32+31) /* "hypervisor" Running on a hypervisor */
 
-/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
+/* Zhaoxin/VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
 #define X86_FEATURE_XSTORE		( 5*32+ 2) /* "rng" RNG present (xstore) */
 #define X86_FEATURE_XSTORE_EN		( 5*32+ 3) /* "rng_en" RNG enabled */
 #define X86_FEATURE_XCRYPT		( 5*32+ 6) /* "ace" on-CPU crypto (xcrypt) */
@@ -154,6 +154,8 @@
 #define X86_FEATURE_PHE_EN		( 5*32+11) /* "phe_en" PHE enabled */
 #define X86_FEATURE_PMM			( 5*32+12) /* "pmm" PadLock Montgomery Multiplier */
 #define X86_FEATURE_PMM_EN		( 5*32+13) /* "pmm_en" PMM enabled */
+#define X86_FEATURE_PHE2		( 5*32+25) /* "phe2" Zhaoxin Padlock Hash Engine v2 */
+#define X86_FEATURE_PHE2_EN		( 5*32+26) /* "phe2_en" PHE2 enabled */
 
 /* More extended AMD flags: CPUID level 0x80000001, ECX, word 6 */
 #define X86_FEATURE_LAHF_LM		( 6*32+ 0) /* "lahf_lm" LAHF/SAHF in long mode */
-- 
2.25.1