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Message-ID: <Z4dNkNLkQlSPA/SA@mev-dev.igk.intel.com>
Date: Wed, 15 Jan 2025 06:55:01 +0100
From: Michal Swiatkowski <michal.swiatkowski@...ux.intel.com>
To: Dheeraj Reddy Jonnalagadda <dheeraj.linuxdev@...il.com>
Cc: anthony.l.nguyen@...el.com, przemyslaw.kitszel@...el.com,
piotr.kwapulinski@...el.com, andrew+netdev@...n.ch,
davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
pabeni@...hat.com, intel-wired-lan@...ts.osuosl.org,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 net-next] ixgbe: Fix endian handling for ACI
descriptor registers
On Wed, Jan 15, 2025 at 09:11:17AM +0530, Dheeraj Reddy Jonnalagadda wrote:
> The ixgbe driver was missing proper endian conversion for ACI descriptor
> register operations. Add the necessary conversions when reading and
> writing to the registers.
>
> Fixes: 46761fd52a88 ("ixgbe: Add support for E610 FW Admin Command Interface")
> Closes: https://scan7.scan.coverity.com/#/project-view/52337/11354?selectedIssue=1602757
> Signed-off-by: Dheeraj Reddy Jonnalagadda <dheeraj.linuxdev@...il.com>
> ---
> Changelog
>
> v2:
> - Updated the patch to include suggested fix
> - Updated the commit message to describe the issue
>
> drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c
> index 683c668672d6..3b9017e72d0e 100644
> --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c
> +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c
> @@ -113,7 +113,7 @@ static int ixgbe_aci_send_cmd_execute(struct ixgbe_hw *hw,
>
> /* Descriptor is written to specific registers */
> for (i = 0; i < IXGBE_ACI_DESC_SIZE_IN_DWORDS; i++)
> - IXGBE_WRITE_REG(hw, IXGBE_PF_HIDA(i), raw_desc[i]);
> + IXGBE_WRITE_REG(hw, IXGBE_PF_HIDA(i), cpu_to_le32(raw_desc[i]));
>
> /* SW has to set PF_HICR.C bit and clear PF_HICR.SV and
> * PF_HICR_EV
> @@ -145,7 +145,7 @@ static int ixgbe_aci_send_cmd_execute(struct ixgbe_hw *hw,
> if ((hicr & IXGBE_PF_HICR_SV)) {
> for (i = 0; i < IXGBE_ACI_DESC_SIZE_IN_DWORDS; i++) {
> raw_desc[i] = IXGBE_READ_REG(hw, IXGBE_PF_HIDA(i));
> - raw_desc[i] = raw_desc[i];
> + raw_desc[i] = le32_to_cpu(raw_desc[i]);
> }
> }
>
> @@ -153,7 +153,7 @@ static int ixgbe_aci_send_cmd_execute(struct ixgbe_hw *hw,
> if ((hicr & IXGBE_PF_HICR_EV) && !(hicr & IXGBE_PF_HICR_C)) {
> for (i = 0; i < IXGBE_ACI_DESC_SIZE_IN_DWORDS; i++) {
> raw_desc[i] = IXGBE_READ_REG(hw, IXGBE_PF_HIDA_2(i));
> - raw_desc[i] = raw_desc[i];
> + raw_desc[i] = le32_to_cpu(raw_desc[i]);
> }
> }
>
> --
> 2.34.1
>
Thanks for fixing it
Reviewed-by: Michal Swiatkowski <michal.swiatkowski@...ux.intel.com>
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