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Message-ID: <CACRpkda0nx3SQtdjmXdCEbVJSWM10TM=p-6JbDjbiYcOSF5PxQ@mail.gmail.com>
Date: Wed, 15 Jan 2025 11:23:50 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: Andre Przywara <andre.przywara@....com>
Cc: Andras Szemzo <szemzo.andras@...il.com>, Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>, Samuel Holland <samuel@...lland.org>,
Philipp Zabel <p.zabel@...gutronix.de>, Maxime Ripard <mripard@...nel.org>,
Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>,
Ulf Hansson <ulf.hansson@...aro.org>, Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Uwe Kleine-König <u.kleine-koenig@...libre.com>,
Florian Fainelli <florian.fainelli@...adcom.com>, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org,
linux-phy@...ts.infradead.org, linux-gpio@...r.kernel.org,
linux-pm@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH 03/12] pinctrl: sunxi: add driver for Allwinner V853.
On Tue, Jan 14, 2025 at 3:20 PM Andre Przywara <andre.przywara@....com> wrote:
> Andras Szemzo <szemzo.andras@...il.com> wrote:
> > The V853 family has multiple package variants, from BGA to QFN88.
> > The latter has co-packaged DRAM and fewer pins, and less features (pin muxes).
> > All family members can be supported by a single driver, as the available pins
> > with allowed muxes is the same across the devices.
>
> It depends a bit on the outcome of the discussion on the A523 pinctrl
> driver [1], but I think we should use the same approach here (and for
> every "new" Allwinner SoC coming up, really): put the pinmux value in the
> DT, and get rid of this entire table altogether:
> [1]
>
> The SoC specific pinctrl driver would then be very small ([2]), so this
> pinctrl support patch here would actually become much smaller.
>
> Just feel a bit sorry for you having created this table, in a tedious and
> eye-straining exercise - been there, done that ;-)
It's pretty stressful for the pin control maintainer as well.
>From the subsystems point of view, groups matches to functions by
strings is the best. ("fun1") + ("group1", "group2"):
pio: pinctrl@...0800 {
compatible = "allwinner,sun8i-r40-pinctrl";
(...)
i2c0_pins: i2c0-pins {
pins = "PB0", "PB1";
function = "i2c0";
};
abstract, strings, nice. The driver handles the particulars.
That is like so because we are designing for users which are
let's say customization engineers. If these engineers jump from
project to project matching function strings to group strings will
be a common way to set up pins, and easy to understand and
grasp, and it makes the DTS very readable.
Then there are the engineers creating the pin control drivers,
and they want everything to be convinient for *them*, and they
think an opaque hex digit in the DTS is perfect at times, thus
pinmux = <0xdeadbeef>;
Mediatek and STM32 made a compromise by using pinmux
and adding some macros to define them so it looks more
pleasant:
i2c0_pins_a: i2c0-default {
pins-i2c0 {
pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
<MT7623_PIN_76_SCL0_FUNC_SCL0>;
bias-disable;
};
};
At least the bias control is using strings, this is nice.
So I'm mostly fine with that as well, but it can be pretty
heavy on people coming from the outside, asking us questions
like "on MT7689 how do you mux pin nnnn to function yyy"???
Well I don't know? Some MT7689_PIN* macro I guess?
If it was just strings I would know what the
expected behaviour and looks would be at least, then the driver
could be buggy or missing things but that's clearly cut. That's
why I prefer the strings.
Yours,
Linus Walleij
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