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Message-Id: <20250116230955.867152-8-rkanwal@rivosinc.com>
Date: Thu, 16 Jan 2025 23:09:55 +0000
From: Rajnesh Kanwal <rkanwal@...osinc.com>
To: linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org
Cc: linux-perf-users@...r.kernel.org,
adrian.hunter@...el.com,
alexander.shishkin@...ux.intel.com,
ajones@...tanamicro.com,
anup@...infault.org,
acme@...nel.org,
atishp@...osinc.com,
beeman@...osinc.com,
brauner@...nel.org,
conor@...nel.org,
heiko@...ech.de,
irogers@...gle.com,
mingo@...hat.com,
james.clark@....com,
renyu.zj@...ux.alibaba.com,
jolsa@...nel.org,
jisheng.teoh@...rfivetech.com,
palmer@...belt.com,
will@...nel.org,
kaiwenxue1@...il.com,
vincent.chen@...ive.com,
Rajnesh Kanwal <rkanwal@...osinc.com>
Subject: [PATCH v2 7/7] riscv: pmu: Integrate CTR Ext support in riscv_pmu_dev driver
This integrates recently added CTR ext support in riscv_pmu_dev driver
to enable branch stack sampling using PMU events.
This mainly adds CTR enable/disable callbacks in rvpmu_ctr_stop()
and rvpmu_ctr_start() function to start/stop branch recording along
with the event.
PMU overflow handler rvpmu_ovf_handler() is also updated to sample
CTR entries in case of the overflow for the particular event programmed
to records branches. The recorded entries are fed to core perf for
further processing.
Signed-off-by: Rajnesh Kanwal <rkanwal@...osinc.com>
---
drivers/perf/riscv_pmu_common.c | 3 +-
drivers/perf/riscv_pmu_dev.c | 67 ++++++++++++++++++++++++++++++++-
2 files changed, 67 insertions(+), 3 deletions(-)
diff --git a/drivers/perf/riscv_pmu_common.c b/drivers/perf/riscv_pmu_common.c
index c4c4b5d6bed0..23077a6c4931 100644
--- a/drivers/perf/riscv_pmu_common.c
+++ b/drivers/perf/riscv_pmu_common.c
@@ -327,8 +327,7 @@ static int riscv_pmu_event_init(struct perf_event *event)
u64 event_config = 0;
uint64_t cmask;
- /* driver does not support branch stack sampling */
- if (has_branch_stack(event))
+ if (needs_branch_stack(event) && !riscv_pmu_ctr_supported(rvpmu))
return -EOPNOTSUPP;
hwc->flags = 0;
diff --git a/drivers/perf/riscv_pmu_dev.c b/drivers/perf/riscv_pmu_dev.c
index b9b257607b76..10697deb1d26 100644
--- a/drivers/perf/riscv_pmu_dev.c
+++ b/drivers/perf/riscv_pmu_dev.c
@@ -1030,7 +1030,7 @@ static void rvpmu_sbi_ctr_stop(struct perf_event *event, unsigned long flag)
static void pmu_sched_task(struct perf_event_pmu_context *pmu_ctx,
bool sched_in)
{
- /* Call CTR specific Sched hook. */
+ riscv_pmu_ctr_sched_task(pmu_ctx, sched_in);
}
static int rvpmu_sbi_find_num_ctrs(void)
@@ -1379,6 +1379,13 @@ static irqreturn_t rvpmu_ovf_handler(int irq, void *dev)
hw_evt->state |= PERF_HES_UPTODATE;
perf_sample_data_init(&data, 0, hw_evt->last_period);
if (riscv_pmu_event_set_period(event)) {
+ if (needs_branch_stack(event)) {
+ riscv_pmu_ctr_consume(cpu_hw_evt, event);
+ perf_sample_save_brstack(
+ &data, event,
+ &cpu_hw_evt->branches->branch_stack, NULL);
+ }
+
/*
* Unlike other ISAs, RISC-V don't have to disable interrupts
* to avoid throttling here. As per the specification, the
@@ -1577,10 +1584,14 @@ static int rvpmu_deleg_ctr_get_idx(struct perf_event *event)
static void rvpmu_ctr_add(struct perf_event *event, int flags)
{
+ if (needs_branch_stack(event))
+ riscv_pmu_ctr_add(event);
}
static void rvpmu_ctr_del(struct perf_event *event, int flags)
{
+ if (needs_branch_stack(event))
+ riscv_pmu_ctr_del(event);
}
static void rvpmu_ctr_start(struct perf_event *event, u64 ival)
@@ -1595,6 +1606,9 @@ static void rvpmu_ctr_start(struct perf_event *event, u64 ival)
if ((hwc->flags & PERF_EVENT_FLAG_USER_ACCESS) &&
(hwc->flags & PERF_EVENT_FLAG_USER_READ_CNT))
rvpmu_set_scounteren((void *)event);
+
+ if (needs_branch_stack(event))
+ riscv_pmu_ctr_enable(event);
}
static void rvpmu_ctr_stop(struct perf_event *event, unsigned long flag)
@@ -1617,6 +1631,9 @@ static void rvpmu_ctr_stop(struct perf_event *event, unsigned long flag)
} else {
rvpmu_sbi_ctr_stop(event, flag);
}
+
+ if (needs_branch_stack(event) && flag != RISCV_PMU_STOP_FLAG_RESET)
+ riscv_pmu_ctr_disable(event);
}
static int rvpmu_find_ctrs(void)
@@ -1652,6 +1669,9 @@ static int rvpmu_event_map(struct perf_event *event, u64 *econfig)
{
u64 config1;
+ if (needs_branch_stack(event) && !riscv_pmu_ctr_valid(event))
+ return -EOPNOTSUPP;
+
config1 = event->attr.config1;
if (riscv_pmu_cdeleg_available() && !pmu_sbi_is_fw_event(event) &&
!(config1 & RISCV_PMU_CONFIG1_GUEST_EVENTS)) { /* GUEST events rely on SBI encoding */
@@ -1701,6 +1721,8 @@ static int rvpmu_starting_cpu(unsigned int cpu, struct hlist_node *node)
enable_percpu_irq(riscv_pmu_irq, IRQ_TYPE_NONE);
}
+ riscv_pmu_ctr_starting_cpu();
+
if (sbi_pmu_snapshot_available())
return pmu_sbi_snapshot_setup(pmu, cpu);
@@ -1715,6 +1737,7 @@ static int rvpmu_dying_cpu(unsigned int cpu, struct hlist_node *node)
/* Disable all counters access for user mode now */
csr_write(CSR_SCOUNTEREN, 0x0);
+ riscv_pmu_ctr_dying_cpu();
if (sbi_pmu_snapshot_available())
return pmu_sbi_snapshot_disable();
@@ -1838,6 +1861,29 @@ static void riscv_pmu_destroy(struct riscv_pmu *pmu)
cpuhp_state_remove_instance(CPUHP_AP_PERF_RISCV_STARTING, &pmu->node);
}
+static int branch_records_alloc(struct riscv_pmu *pmu)
+{
+ struct branch_records __percpu *tmp_alloc_ptr;
+ struct branch_records *records;
+ struct cpu_hw_events *events;
+ int cpu;
+
+ if (!riscv_pmu_ctr_supported(pmu))
+ return 0;
+
+ tmp_alloc_ptr = alloc_percpu_gfp(struct branch_records, GFP_KERNEL);
+ if (!tmp_alloc_ptr)
+ return -ENOMEM;
+
+ for_each_possible_cpu(cpu) {
+ events = per_cpu_ptr(pmu->hw_events, cpu);
+ records = per_cpu_ptr(tmp_alloc_ptr, cpu);
+ events->branches = records;
+ }
+
+ return 0;
+}
+
static void rvpmu_event_init(struct perf_event *event)
{
/*
@@ -1850,6 +1896,9 @@ static void rvpmu_event_init(struct perf_event *event)
event->hw.flags |= PERF_EVENT_FLAG_USER_ACCESS;
else
event->hw.flags |= PERF_EVENT_FLAG_LEGACY;
+
+ if (branch_sample_call_stack(event))
+ event->attach_state |= PERF_ATTACH_TASK_DATA;
}
static void rvpmu_event_mapped(struct perf_event *event, struct mm_struct *mm)
@@ -1997,6 +2046,15 @@ static int rvpmu_device_probe(struct platform_device *pdev)
pmu->pmu.attr_groups = riscv_cdeleg_pmu_attr_groups;
else
pmu->pmu.attr_groups = riscv_sbi_pmu_attr_groups;
+
+ ret = riscv_pmu_ctr_init(pmu);
+ if (ret)
+ goto out_free;
+
+ ret = branch_records_alloc(pmu);
+ if (ret)
+ goto out_ctr_finish;
+
pmu->cmask = cmask;
pmu->ctr_add = rvpmu_ctr_add;
pmu->ctr_del = rvpmu_ctr_del;
@@ -2013,6 +2071,10 @@ static int rvpmu_device_probe(struct platform_device *pdev)
pmu->csr_index = rvpmu_csr_index;
pmu->sched_task = pmu_sched_task;
+ ret = cpuhp_state_add_instance(CPUHP_AP_PERF_RISCV_STARTING, &pmu->node);
+ if (ret)
+ goto out_ctr_finish;
+
ret = riscv_pm_pmu_register(pmu);
if (ret)
goto out_unregister;
@@ -2062,6 +2124,9 @@ static int rvpmu_device_probe(struct platform_device *pdev)
out_unregister:
riscv_pmu_destroy(pmu);
+out_ctr_finish:
+ riscv_pmu_ctr_finish(pmu);
+
out_free:
kfree(pmu);
return ret;
--
2.34.1
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