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Message-ID:
 <SA1PR12MB71993DB6EF3BA49D3CAB8E83B01B2@SA1PR12MB7199.namprd12.prod.outlook.com>
Date: Fri, 17 Jan 2025 21:56:56 +0000
From: Ankit Agrawal <ankita@...dia.com>
To: Alex Williamson <alex.williamson@...hat.com>
CC: Jason Gunthorpe <jgg@...dia.com>, Yishai Hadas <yishaih@...dia.com>,
	"shameerali.kolothum.thodi@...wei.com"
	<shameerali.kolothum.thodi@...wei.com>, "kevin.tian@...el.com"
	<kevin.tian@...el.com>, Zhi Wang <zhiw@...dia.com>, Aniket Agashe
	<aniketa@...dia.com>, Neo Jia <cjia@...dia.com>, Kirti Wankhede
	<kwankhede@...dia.com>, "Tarun Gupta (SW-GPU)" <targupta@...dia.com>, Vikram
 Sethi <vsethi@...dia.com>, Andy Currid <acurrid@...dia.com>, Alistair Popple
	<apopple@...dia.com>, John Hubbard <jhubbard@...dia.com>, Dan Williams
	<danw@...dia.com>, "Anuj Aggarwal (SW-GPU)" <anuaggarwal@...dia.com>, Matt
 Ochs <mochs@...dia.com>, "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 3/3] vfio/nvgrace-gpu: Check the HBM training and C2C
 link status

>> No, the driver needs to enable memory on the device around the iomap
>> rather than assuming the initial state.  Thanks,
>>
>> Alex
>
> Ack, thanks for the suggestion.
>
> I'll change nvgrace_gpu_wait_device_ready to read the PCI_COMMAND
> through pci_read_config_word before pci_iomap. And if PCI_COMMAND_MEMORY
> is not set, update through pci_write_config_word.

Or perhaps better to call vfio_pci_memory_lock_and_enable(). I'll make the change
and send out the next version.

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