[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250117142304.596106-11-andriy.shevchenko@linux.intel.com>
Date: Fri, 17 Jan 2025 16:21:54 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Patrick Rudolph <patrick.rudolph@...ements.com>,
Linus Walleij <linus.walleij@...aro.org>
Subject: [PATCH v1 10/16] pinctrl: cy8c95x0: Remove redundant check in cy8c95x0_regmap_update_bits_base()
The function is never called with the PORTSEL register in the argument.
Drop unneeded check, but rescue a comment. While at it, drop inline
and allow any compiler to choose better stragy (note, that inline in
C code is only a recomendation to most of the modern compilers anyway).
Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
---
drivers/pinctrl/pinctrl-cy8c95x0.c | 16 +++++-----------
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c
index 61225beb0714..3907970a3e6e 100644
--- a/drivers/pinctrl/pinctrl-cy8c95x0.c
+++ b/drivers/pinctrl/pinctrl-cy8c95x0.c
@@ -476,20 +476,14 @@ static const struct regmap_config cy8c9520_i2c_regmap = {
#endif
};
-static inline int cy8c95x0_regmap_update_bits_base(struct cy8c95x0_pinctrl *chip,
- unsigned int reg,
- unsigned int port,
- unsigned int mask,
- unsigned int val,
- bool *change, bool async,
- bool force)
+/* Caller should never modify PORTSEL directly */
+static int cy8c95x0_regmap_update_bits_base(struct cy8c95x0_pinctrl *chip,
+ unsigned int reg, unsigned int port,
+ unsigned int mask, unsigned int val,
+ bool *change, bool async, bool force)
{
int ret, off, i;
- /* Caller should never modify PORTSEL directly */
- if (reg == CY8C95X0_PORTSEL)
- return -EINVAL;
-
/* Registers behind the PORTSEL mux have their own range in regmap */
if (cy8c95x0_muxed_register(reg)) {
off = CY8C95X0_MUX_REGMAP_TO_OFFSET(reg, port);
--
2.43.0.rc1.1336.g36b5255a03ac
Powered by blists - more mailing lists