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Message-ID: <20250117142304.596106-16-andriy.shevchenko@linux.intel.com> Date: Fri, 17 Jan 2025 16:21:59 +0200 From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com> To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>, linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org Cc: Patrick Rudolph <patrick.rudolph@...ements.com>, Linus Walleij <linus.walleij@...aro.org> Subject: [PATCH v1 15/16] pinctrl: cy8c95x0: Separate EEPROM related register definitios Currently it's not easy to see at a glance the group of the registers that are per port. Add a blank line and a comment to make it better. Also add a missing definition for one of the EEPROM related registers. Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com> --- drivers/pinctrl/pinctrl-cy8c95x0.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 7f7bc374c2fc..6ee21e697e43 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -40,6 +40,7 @@ /* Port Select configures the port */ #define CY8C95X0_PORTSEL 0x18 + /* Port settings, write PORTSEL first */ #define CY8C95X0_INTMASK 0x19 #define CY8C95X0_SELPWM 0x1A @@ -53,6 +54,9 @@ #define CY8C95X0_DRV_PP_FAST 0x21 #define CY8C95X0_DRV_PP_SLOW 0x22 #define CY8C95X0_DRV_HIZ 0x23 + +/* Internal device configuration */ +#define CY8C95X0_ENABLE_WDE 0x2D #define CY8C95X0_DEVID 0x2E #define CY8C95X0_WATCHDOG 0x2F #define CY8C95X0_COMMAND 0x30 -- 2.43.0.rc1.1336.g36b5255a03ac
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