linux-kernel - drivers/clk/clk-renesas-pcie.c:178:31: warning: '%d' directive output may be truncated writing between 1 and 4 bytes into a region of size 2

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Message-ID: <202501200756.HycDH8wZ-lkp@intel.com>
Date: Mon, 20 Jan 2025 07:45:07 +0800
From: kernel test robot <lkp@...el.com>
To: Marek Vasut <marek.vasut+renesas@...lbox.org>
Cc: oe-kbuild-all@...ts.linux.dev, linux-kernel@...r.kernel.org,
	Stephen Boyd <sboyd@...nel.org>
Subject: drivers/clk/clk-renesas-pcie.c:178:31: warning: '%d' directive
 output may be truncated writing between 1 and 4 bytes into a region of size
 2

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   9528d418de4d83c7ada69314ddd8d4427b1f703a
commit: cd9a5c97dfdaeb9c8ac02e14d7ccbd445e8b5265 clk: rs9: Replace model check with bitshift from chip data
date:   1 year, 1 month ago
config: s390-randconfig-r111-20250120 (https://download.01.org/0day-ci/archive/20250120/202501200756.HycDH8wZ-lkp@intel.com/config)
compiler: s390-linux-gcc (GCC) 14.2.0
reproduce: (https://download.01.org/0day-ci/archive/20250120/202501200756.HycDH8wZ-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202501200756.HycDH8wZ-lkp@intel.com/

All warnings (new ones prefixed by >>):

   drivers/clk/clk-renesas-pcie.c: In function 'rs9_probe':
>> drivers/clk/clk-renesas-pcie.c:178:31: warning: '%d' directive output may be truncated writing between 1 and 4 bytes into a region of size 2 [-Wformat-truncation=]
     178 |         snprintf(name, 5, "DIF%d", idx);
         |                               ^~
   In function 'rs9_get_output_config',
       inlined from 'rs9_probe' at drivers/clk/clk-renesas-pcie.c:305:9:
   drivers/clk/clk-renesas-pcie.c:178:27: note: directive argument in the range [-250, 63]
     178 |         snprintf(name, 5, "DIF%d", idx);
         |                           ^~~~~~~
   drivers/clk/clk-renesas-pcie.c:178:9: note: 'snprintf' output between 5 and 8 bytes into a destination of size 5
     178 |         snprintf(name, 5, "DIF%d", idx);
         |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


vim +178 drivers/clk/clk-renesas-pcie.c

603df193ec5174 Alexander Stein 2023-03-10  165  
892e0ddea1aa6f Marek Vasut     2022-02-26  166  static int rs9_get_output_config(struct rs9_driver_data *rs9, int idx)
892e0ddea1aa6f Marek Vasut     2022-02-26  167  {
892e0ddea1aa6f Marek Vasut     2022-02-26  168  	struct i2c_client *client = rs9->client;
603df193ec5174 Alexander Stein 2023-03-10  169  	u8 dif = rs9_calc_dif(rs9, idx);
892e0ddea1aa6f Marek Vasut     2022-02-26  170  	unsigned char name[5] = "DIF0";
892e0ddea1aa6f Marek Vasut     2022-02-26  171  	struct device_node *np;
892e0ddea1aa6f Marek Vasut     2022-02-26  172  	int ret;
892e0ddea1aa6f Marek Vasut     2022-02-26  173  	u32 sr;
892e0ddea1aa6f Marek Vasut     2022-02-26  174  
892e0ddea1aa6f Marek Vasut     2022-02-26  175  	/* Set defaults */
603df193ec5174 Alexander Stein 2023-03-10  176  	rs9->clk_dif_sr |= dif;
892e0ddea1aa6f Marek Vasut     2022-02-26  177  
892e0ddea1aa6f Marek Vasut     2022-02-26 @178  	snprintf(name, 5, "DIF%d", idx);
892e0ddea1aa6f Marek Vasut     2022-02-26  179  	np = of_get_child_by_name(client->dev.of_node, name);
892e0ddea1aa6f Marek Vasut     2022-02-26  180  	if (!np)
892e0ddea1aa6f Marek Vasut     2022-02-26  181  		return 0;
892e0ddea1aa6f Marek Vasut     2022-02-26  182  
892e0ddea1aa6f Marek Vasut     2022-02-26  183  	/* Output clock slew rate */
892e0ddea1aa6f Marek Vasut     2022-02-26  184  	ret = of_property_read_u32(np, "renesas,slew-rate", &sr);
892e0ddea1aa6f Marek Vasut     2022-02-26  185  	of_node_put(np);
892e0ddea1aa6f Marek Vasut     2022-02-26  186  	if (!ret) {
892e0ddea1aa6f Marek Vasut     2022-02-26  187  		if (sr == 2000000) {		/* 2V/ns */
603df193ec5174 Alexander Stein 2023-03-10  188  			rs9->clk_dif_sr &= ~dif;
892e0ddea1aa6f Marek Vasut     2022-02-26  189  		} else if (sr == 3000000) {	/* 3V/ns (default) */
603df193ec5174 Alexander Stein 2023-03-10  190  			rs9->clk_dif_sr |= dif;
892e0ddea1aa6f Marek Vasut     2022-02-26  191  		} else
892e0ddea1aa6f Marek Vasut     2022-02-26  192  			ret = dev_err_probe(&client->dev, -EINVAL,
892e0ddea1aa6f Marek Vasut     2022-02-26  193  					    "Invalid renesas,slew-rate value\n");
892e0ddea1aa6f Marek Vasut     2022-02-26  194  	}
892e0ddea1aa6f Marek Vasut     2022-02-26  195  
892e0ddea1aa6f Marek Vasut     2022-02-26  196  	return ret;
892e0ddea1aa6f Marek Vasut     2022-02-26  197  }
892e0ddea1aa6f Marek Vasut     2022-02-26  198  

:::::: The code at line 178 was first introduced by commit
:::::: 892e0ddea1aa6f70b68cb2dd8e16bf271e20e72f clk: rs9: Add Renesas 9-series PCIe clock generator driver

:::::: TO: Marek Vasut <marex@...x.de>
:::::: CC: Stephen Boyd <sboyd@...nel.org>

-- 
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